參數(shù)資料
型號: MPC18730EP
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Power Management IC with Five Regulated Outputs Programmed Through 3 Wire Serial Interface
中文描述: 與電源管理IC,通過3線串行接口編程五穩(wěn)壓輸出
文件頁數(shù): 28/35頁
文件大小: 617K
代理商: MPC18730EP
Analog Integrated Circuit Device Data
Freescale Semiconductor
28
18730
TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
Figure 12. MPC18730 Typical Application Diagram (Ni-MH Battery)
VGATE_EXT
VREF
VO1_SENSE
PGND1
VOUT1
SW2
VBATT
VBATT
LVB
HVB
EAOUT2
EAIN2
DMAX2
VO1_SENSE
PGOOD2_DELAY
PGND2
VIN2
VO2_SENSE
VOUT2
VBATT
VO2_SENSE_IN
DATA
VGATE
SREGO1
SREGC1
SREGC2
SREGC3
VBATT
GNDGATE
SREGI1
WATCHDOG
GND
SEQ_SELECT
CH_PUMP
SREGO2
SREGO3
SREGI3
CLEAR
BANDGAP
REFERENCE
VO1_SENSE
VBATT
VGATE
POWER
SWITCH1
LVB
PGOOD1(Int)
PGOOD1(Int)
PGOOD1(Int)
Step-UpDown
DC/DC
Converter
CH1
VMODE
PGOOD1(Int)
REF1
VGATE
POWER
SWITCH2
REF2
PGOOD2(Int)
VGATE
Step-UpDown
DC/DC
Converter
PGOOD2(Int)
CONTROL
V_STDBY
VO1_SENSE
Series Pass
Regulator1
VGATE
VGATE
VBATT
VREF
Series Pass
Regulator2
VGATE
VBATT
REF3
REF4
REF5
EXT_CLOCK
REF1
REF2
REF3
REF4
REF5
REF DAC
Series Pass
Regulator3
VGATE
CPoff
VG_duty
VG_select
VGATESEL1
VGATESEL2
VGATE
VO1_SENSE
HG
LG
PGOOD1_DELAY
or
PGOOD2_DELAY
SW1
SWGATE
Buffer
EXT gate
On
EXT_CLOCK
CLEAR
SLEEP
SCKIN
WAKE2B
WAKE3B
WAKE4B
SREGO3
PGOOD2
RESET1_TH
EAIN1
PGOOD1
LSWO
PGOOD1_DELAY
SREGO1
SREGO2
SREG2G
Control
Logic
Step-Up
DC/DC
Convertor
RESET
Block 2
VO1_SENSE
RESET
Block 1
PGOOD2
(Int)
CH2
VGATE
VO1_SENSE
VBATT
SEQ_SELECT
PGOOD1(Int)
EAOUT1
VIN1
VO1_SENSE
V_STDBY
VO1_SENSE
VO1_SENSE
VMODE
STRB
VBATT
SREG12
WAKE1B
VREF
DMAX1
VREF
VREF
VO1_SENSE
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