- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359188 > MPC18730EP (飛思卡爾半導(dǎo)體(中國)有限公司) Power Management IC with Five Regulated Outputs Programmed Through 3 Wire Serial Interface PDF資料下載
參數(shù)資料
| 型號： | MPC18730EP |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Power Management IC with Five Regulated Outputs Programmed Through 3 Wire Serial Interface |
| 中文描述： | 與電源管理IC，通過3線串行接口編程五穩(wěn)壓輸出 |
| 文件頁數(shù)： | 17/35頁 |
| 文件大?。?/td> | 617K |
| 代理商： | MPC18730EP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
18730
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
START-UP CONTROL INPUT (SYSTEM CONTROL)
The latch is set at the rising edge of any WAKE1B-4B input
pin, and WAKE(int) goes High. WAKE1~4B inputs consist of
OR logic. At this time, the input pin which went Low keeps
latched until CLEAR goes High. After the latch is reset by
CLEAR, WAKE(int) goes Low when SLEEP goes High. The
latch is also cleared and WAKE(int) goes Low when SLEEP
goes High before the latch is cleared by CLEAR. In this case,
CLEAR keeps negated while PGOOD1, 2(Ext) is Low.
SLEEP keeps negated while PGOOD1, 2(Ext) is Low or
CLEAR is High. The period of time for which CLEAR and
SLEEP are negated can be set by the SEQ_SELECT pin.
Refer to Truth
Table 5, on page 12
for the correspondence
between the SEQ_SELECT pin settings and negation period.
If SLEEP goes High to place the chip into the standby
mode while any of the WAKEB pins is Low, the chip can be
awakened again. This may happen if, when an WAKEB pin
and LSWO are connected, SLEEP goes High earlier than the
period of time (*1) specified by the external component of the
WAKEB pin.
Also, if the period of time after WAKE(int) goes High until
CLEAR goes High from Low is longer than the time specified
by WATCHDOG, internal sleep will start up to place the chip
into the standby mode.
(*1: It is 30 μsec when a capacitor is not connected as the
external component.)
Figure 6. Start-Up Timing Diagram
STANDBY POWER SUPPLY CIRCUIT
Figure 7. Standby Power Supply Circuit Diagram
When PGOOD1(int) is Low, output LVB voltage to
V_STDBY pin. When PGOOD1(int) is High, output
VO1_SENSE voltage to V_STDBY pin. When CLEAR is Low,
LSWO is open. When PGOOD1(int) is High and CLEAR is
High, LSWO output voltage turns GND. When PGOOD1(int)
is Low and PGOOD1 is High, discharge the external
CLEAR
WATCHDOG
WAKEB
WAKE(Int)
Time specified by WATCHDOG
VBATT
CLEAR
LVB
VBATT
Short-circuit VBATT and LVB, and connect a
Schottky diode between VBATT and V_STDBY
only when using Ni_mh.
When using Li_ion, leave LVB open, and short-
circuit HVB and VBATT.
PGOOD1
PGOOD1(Int)
VO1_SENSE
LSWO
V_STDBY
V_STDBY
HVB
Standby
Power
Supply
Control
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC5200B | SDRAM/DDR Memory Controller |
| MPC5200 | Hardware Specifications |
| MPC5534 | Microcontroller |
| MPC7447A | PowerPC microprocessor |
| MPC7447ANXPNS | PowerPC microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC18730EP | 制造商:Freescale Semiconductor 功能描述:IC POWER MANAG PROG 121MA 64QFN |
| MPC18730EP/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Power Management IC with Five Power Management IC with Five Power Management IC with Five Power Management IC with Five |
| MPC18730EPR2 | 功能描述:板上安裝壓力/力傳感器 POWER MGT IC RoHS:否 制造商:Honeywell 工作壓力:0 bar to 4 bar 壓力類型:Gage 準(zhǔn)確性:+ / - 0.25 % 輸出類型:Digital 安裝風(fēng)格:Through Hole 工作電源電壓:5 V 封裝 / 箱體:SIP 端口類型:Dual Radial Barbed, Same sides |
| MPC18A26VMEL | 制造商:Motorola Inc 功能描述: |
| MPC190VMB | 制造商:Freescale Semiconductor 功能描述:IC SECURITY PROCESSOR 252-MAPBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。