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| 型號(hào)： | MPC7400RX400TX |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 27/44頁 |
| 文件大小： | 744K |
| 代理商： | MPC7400RX400TX |
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MPC7400 RISC Microprocessor Hardware Specications
33
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
System Design Information
The circuit should be placed as close as possible to the AVdd pin to minimize noise coupled from nearby
circuits. An identical but separate circuit should be placed as close as possible to the L2AVdd pin. It is often
possible to route directly from the capacitors to the AVdd pin, which is on the periphery of the 360 CBGA
footprint, without the inductance of vias. The L2AVdd pin may be more difcult to route but is
proportionately less critical.
Figure 18. PLL Power Supply Filter Circuit
1.8.3 Power Supply Voltage Sequencing
The notes in Table 1 contain cautions about the sequencing of the external bus voltages and core voltage of
the MPC7400 (when they are different). These cautions are necessary for the long term reliability of the part.
If they are violated, the ESD (Electrostatic Discharge) protection diodes will be forward biased and
excessive current can ow through these diodes. If the system power supply design does not control the
voltage sequencing, one or both of the circuits of Figure 19 can be added to meet these requirements. The
MUR420 Schottky diodes of Figure 19 control the maximum potential difference between the external bus
and core power supplies on power-up and the 1N5820 diodes regulate the maximum potential difference on
power-down.
Figure 19. Example Voltage Sequencing Circuits
1.8.4 Decoupling Recommendations
Due to the MPC7400’s dynamic power management feature, large address and data buses, and high
operating frequencies, the MPC7400 can generate transient power surges and high frequency noise in its
power supply, especially while driving large capacitive loads. This noise must be prevented from reaching
other components in the MPC7400 system, and the MPC7400 itself requires a clean, tightly regulated source
of power. Therefore, it is recommended that the system designer place at least one decoupling capacitor at
each Vdd, OVdd, and L2OVdd pin of the MPC7400. It is also recommended that these decoupling
capacitors receive their power from separate Vdd, (L2)OVdd, and GND power planes in the PCB, utilizing
short traces to minimize inductance.
These capacitors should have a value of 0.01 F or 0.1 F. Only ceramic SMT (surface mount technology)
capacitors should be used to minimize lead inductance, preferably 0508 or 0603 orientations where
connections are made along the length of the part. Consistent with the recommendations of Dr. Howard
Vdd
AVdd (or L2AVdd)
10
2.2 F
GND
Low ESL surface mount capacitors
3.3V
1.8V
MUR420
1N5820
MUR420
1N5820
2.5V
1.8V
MUR420
1N5820
MUR420
1N5820
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For More Information On This Product,
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