參數(shù)資料
型號(hào)： MPC8349CZUAJFB
廠商： Freescale Semiconductor
文件頁數(shù)： 3/87頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 672TBGA
標(biāo)準(zhǔn)包裝： 24
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 533MHz
電壓： 1.2V
安裝類型： 表面貼裝
封裝/外殼： 672-LBGA
供應(yīng)商設(shè)備封裝： 672-TBGA（35x35）
包裝： 托盤
配用： MPC8349E-MITX-GP-ND - KIT REFERENCE PLATFORM MPC8349E
MPC8349E-MITXE-ND - BOARD REFERENCE FOR MPC8349
MPC8349EA-MDS-PB-ND - KIT MODULAR DEV SYSTEM MPC8349E
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
11
Power Characteristics
Table 5 shows the estimated typical I/O power dissipation for MPC8349EA.
2 Typical power is based on a voltage of V
DD = 1.2 V, a junction temperature of TJ = 105°C, and a Dhrystone benchmark
application.
3 Thermal solutions may need to design to a value higher than typical power based on the end application, T
A target, and I/O
power.
4 Maximum power is based on a voltage of V
DD = 1.2 V, worst case process, a junction temperature of TJ =105°C, and an
artificial smoke test.
5 Typical power is based on a voltage of V
DD = 1.3 V, a junction temperature of TJ = 105°C, and a Dhrystone benchmark
application.
6 Maximum power is based on a voltage of V
DD = 1.3 V, worst case process, a junction temperature of TJ =105°C, and an
artificial smoke test.
Table 5. MPC8349EA Typical I/O Power Dissipation
Interface
Parameter
GVDD
(1.8 V)
GVDD
(2.5 V)
OVDD
(3.3 V)
LVDD
(3.3 V)
LVDD
(2.5 V)
Unit
Comments
DDR I/O
65% utilization
2.5 V
Rs = 20
Ω
Rt = 50
Ω
2 pair of clocks
200 MHz, 32 bits
0.31
0.42
—
W
—
200 MHz, 64 bits
0.42
0.55
—
W
—
266 MHz, 32 bits
0.35
0.5
—
W
—
266 MHz, 64 bits
0.47
0.66
—
W
—
300 MHz, 32 bits
0.37
0.54
—
W
—
300 MHz, 64 bits
0.50
0.7
—
W
—
333 MHz, 32 bits
0.39
0.58
—
W
—
333 MHz, 64 bits
0.53
0.76
—
W
—
400 MHz, 32 bits
0.44
————
—
400 MHz, 64 bits
0.59
————
—
PCI I/O
load = 30 pF
33 MHz, 64 bits
—
0.08
—
W
—
66 MHz, 64 bits
—
0.14
—
W
—
33 MHz, 32 bits
—
0.04
—
W
Multiply by 2 if using
2ports.
66 MHz, 32 bits
—
0.07
—
W
Local bus I/O
load = 25 pF
133 MHz, 32 bits
—
0.27
—
W
—
83 MHz, 32 bits
—
0.17
—
W
—
66 MHz, 32 bits
—
0.14
—
W
—
50 MHz, 32 bits
—
0.11
—
W
—
TSEC I/O
load = 25 pF
MII
—
0.01
—
W
Multiply by number of
interfaces used.
GMII or TBI
—
0.06
—
W
RGMII or RTBI
————
0.04
W
USB
12 MHz
—
0.01
—
W
Multiply by 2 if using
2ports.
480 MHz
—
0.2
—
W
Other I/O
—
0.01
—
W
—
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