參數(shù)資料
型號: MPC8378EVRANFA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 333 MHz, MICROPROCESSOR, PBGA689
封裝: 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件頁數(shù): 43/125頁
文件大?。?/td> 894K
代理商: MPC8378EVRANFA
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
24
8
Ethernet: Enhanced Three-Speed Ethernet (eTSEC)
This section provides the AC and DC electrical characteristics for the enhanced three-speed Ethernet controller.
8.1
SGMII Interface Electrical Characteristics
Each SGMII port features a 4-wire AC-coupled serial link from the dedicated SerDes1 interface of the MPC8378E as shown in
Figure 7, where CTX is the external (on board) AC-coupled capacitor. Each output pin of the SerDes transmitter differential pair
features 50-
output impedance. Each input of the SerDes receiver differential pair features 50- on-die termination to
SGND_SRDSn (xcorevss). The reference circuit of the SerDes transmitter and receiver is shown in Figure 65.
When an eTSEC port is configured to operate in SGMII mode, the parallel interface’s output signals of this eTSEC port can be
left floating. Also, when operating in SGMII mode, the eTSEC EC_GTX_CLK125 clock is not required for this port. Instead,
the SerDes reference clock is required on L1_SD_REF_CLK and L1_SD_REF_CLK pins.
Figure 7. 4-Wire AC-Coupled SGMII Serial Link Connection Example
8.2
Enhanced Three-Speed Ethernet Controller (eTSEC)
(10/100/1000 Mbps)—SGMII/MII/RGMII/RTBI/RMII DC Electrical
Characteristics
The electrical characteristics specified here apply to serial gigabit media independent interface (SGMII), media independent
interface (MII), reduced gigabit media independent interface (RGMII), reduced ten-bit interface (RTBI), reduced media
independent interface (RMII) signals, management data input/output (MDIO) and management data clock (MDC).
The MII and RMII interfaces are defined for 3.3 V, while the RGMII and RTBI interfaces can be operated at 2.5 V. The SGMII
interface conforms to the Serial-GMII Specification Version 1.8 with some exceptions. The RGMII and RTBI interfaces follow
the Reduced Gigabit Media-Independent Interface (RGMII) Specification Version 1.3. The RMII interface follows the RMII
Consortium RMII Specification Version 1.2.
SGMII SerDes
Interface
50
50
Transmitter
SD_TXn
SD_RXm
SD_TXn
SD_RXm
Receiver
CTX
50
50
SD_RXn
Receiver
Transmitter
SD_TXm
CTX
50
50
50
50
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