參數(shù)資料
型號： MPC8378EVRANFA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 333 MHz, MICROPROCESSOR, PBGA689
封裝： 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件頁數(shù)： 51/125頁
文件大?。?/td> 894K
代理商： MPC8378EVRANFA
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
31
8.3.3
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
8.3.3.1
MII Transmit AC Timing Specifications
This table provides the MII transmit AC timing specifications.
This figure shows the MII transmit AC timing diagram.
Figure 11. MII Transmit AC Timing Diagram
8.3.3.2
MII Receive AC Timing Specifications
This table provides the MII receive AC timing specifications.
Table 31. MII Transmit AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 5%.
Parameter
Min
Typical
Max
Unit
TX_CLK clock period 10 Mbps
tMTX
—
400
—
ns
TX_CLK clock period 100 Mbps
tMTX
—40—
ns
TX_CLK duty cycle
tMTXH/tMTX
35
—
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
15
ns
TX_CLK data clock rise (20%–80%)
tMTXR
1.0
—
4.0
ns
TX_CLK data clock fall (80%–20%)
tMTXF
1.0
—
4.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII
transmit timing (MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in
general, the clock reference symbol representation is based on two to three letters representing the clock of a particular
functional. For example, the subscript of tMTX represents the MII(M) transmit (TX) clock. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
Table 32. MII Receive AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 5%.
Parameter
Symbol1
Min
Typical
Max
Unit
Input low voltage
VIL
——
0.7
V
Input high voltage
VIH
1.9
—
V
RX_CLK clock period 10 Mbps
tMRX
—400
—
ns
TX_CLK
TXD[3:0]
tMTKHDX
tMTX
tMTXH
tMTXR
tMTXF
TX_EN
TX_ER
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