參數(shù)資料
型號: MPC8569VTANKGB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件頁數(shù): 115/126頁
文件大小: 2847K
代理商: MPC8569VTANKGB
Serial RapidIO (SRIO)
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
89
2.10.4
Compliance Test and Measurement Load
The AC timing and voltage parameters must be verified at the measurement point. The package pins of the device must be
connected to the test/measurement load within 0.2 inches of that load, as shown in the following figure.
NOTE
The allowance of the measurement point to be within 0.2 inches of the package pins is
meant to acknowledge that package/board routing may benefit from D+ and D– not being
exactly matched in length at the package pin boundary. If the vendor does not explicitly
state where the measurement point is located, the measurement point is assumed to be the
D+ and D– package pins.
Figure 46. Compliance Test/Measurement Load
2.11
Serial RapidIO (SRIO)
This section describes the DC and AC electrical specifications for the Serial RapidIO interface of the MPC8569E, for the
LP-serial physical layer. The electrical specifications cover both single- and multiple-lane links. Two transmitters (short and
long run) and a single receiver are specified for each of three baud rates, 1.25, 2.50, and 3.125 GBaud.
Two transmitter specifications allow for solutions ranging from simple board-to-board interconnect to driving two connectors
across a backplane. A single receiver specification is given that will accept signals from both the short- and long-run transmitter
specifications.
The short-run transmitter must be used mainly for chip-to-chip connections on either the same printed-circuit board or across a
single connector. This covers the case where connections are made to a mezzanine (daughter) card. The minimum swings of the
short-run specification reduce the overall power used by the transceivers.
The long-run transmitter specifications use larger voltage swings that are capable of driving signals across backplanes. This
allows a user to drive signals across two connectors and a backplane. The specifications allow a distance of at least 50 cm at all
baud rates.
All unit intervals are specified with a tolerance of ±100 ppm. The worst case frequency difference between any transmit and
receive clock is 200 ppm.
To ensure interoperability between drivers and receivers of different vendors and technologies, AC-coupling at the receiver input
must be used.Signal Definitions
2.11.1
Signal Definitions
This section defines terms used in the description and specification of differential signals used by the LP-Serial links. Figure 47
shows how the signals are defined. The figures show waveforms for either a transmitter output (TD and TD) or a receiver input
TX
Silicon
+ Package
C = CTX
R = 50
Ω
R = 50
Ω
D+ Package
Pin
D– Package
Pin
D+ Package
Pin
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