參數(shù)資料
型號(hào)： MQ80C52CXXX-20/883R
廠商： ATMEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44
封裝： CERAMIC, QFP-44
文件頁(yè)數(shù)： 88/101頁(yè)
文件大?。?/td> 3398K
代理商： MQ80C52CXXX-20/883R
110
In Extended Operating Mode during TX_ARET operation (see section 5.2.4), the radio
transceiver switches to receive state if an acknowledgement of a previously transmitted
frame was requested. During this period, received frames are evaluated but not stored
in the Frame Buffer. This allows the radio transceiver to wait for an acknowledgement
frame and retry the frame transmission without writing the frame again.
A radio transceiver state change, except a transition to SLEEP state or a reset, does
not affect the Frame Buffer content. If the radio transceiver is taken into SLEEP, the
Frame Buffer is powered off and the stored data get lost.
7.4.2 Frame Content
The AT86RF212 supports an IEEE 802.15.4 compliant frame format as shown in Figure
Figure 7-11. AT86RF212 Frame Structure
Note:
1. Writing the FCS can be omitted if TX_AUTO_CRC_ON = 1 (register 0x04,
TRX_CTRL_1).
A frame comprises two sections, the radio transceiver internally generated SHR field
and the user accessible part stored in the Frame Buffer. The SHR contains the
preamble and the SFD field. The variable frame section contains the PHR and the
PSDU including the FCS, see section 6.3. To access the data, follow the procedures
described in section 4.3.2.
The frame length information (PHR field) and the PSDU are stored in the Frame Buffer.
During frame reception, the link quality indicator (LQI) value, the energy detection (ED)
value, and the status information (RX_STATUS) of a received frame are additionally
stored. The radio transceiver appends these values to the frame data during Frame
Buffer read access. For more information, see sections 6.8, 6.5, and 4.3.2, respectively.
If the SRAM read access is used to read an RX frame, the frame length field (PHR) can
be accessed at address 0. The SHR (except the SFD value used to generate the SHR)
cannot be read by the microcontroller.
For frame transmission, the PHR and the PSDU need to be stored in the Frame Buffer.
The maximum Frame Buffer size supported by the radio transceiver is 128 bytes. If the
TX_AUTO_CRC_ON bit is set in register 0x05 (PHY_TX_PWR), the FCS field of the
PSDU is replaced by the automatically calculated FCS during frame transmission.
There is no need to write the FCS field when using the automatic FCS generation.
To manipulate individual bytes of the Frame Buffer, a SRAM write access can be used.
For non IEEE 802.15.4 compliant frames, the minimum frame length supported by the
radio transceiver is 1 byte (Frame Length Field + 1 byte of data).
AT86RF212
8168C-MCU Wireless-02/10
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