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| 型號(hào)： | MQ80C52TXXX-16SHXXX:RD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁(yè)數(shù)： | 10/83頁(yè) |
| 文件大?。?/td> | 8336K |
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155
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
16.8
Interrupts
16.8.1 Interrupt organization
The different interrupts are:
●
Interrupt on receive completed OK,
●
Interrupt on transmit completed OK,
●
Interrupt on error (bit error, stuff error, CRC error, form error, acknowledge error),
●
Interrupt on frame buffer full,
●
Interrupt on “Bus Off” setting,
●
Interrupt on overrun of CAN timer.
The general interrupt enable is provided by ENIT bit and the specific interrupt enable for CAN timer overrun is provided by
ENORVT bit.
Figure 16-14. CAN Controller Interrupt Structure
TXOK[i]
CANSTMOB.6
CANSTMOB.5
CANSTMOB.4
CANSTMOB.3
CANSTMOB.2
CANSTMOB.1
CANSTMOB.0
CANGIT.4
CANGIT.3
CANGIT.2
CANGIT.1
CANGIT.0
CANGIT.6
CANGIT.5
ENTX
RXOK[i]
BERR[i]
SERR[i]
CERR[i]
FERR[i]
AERR[i]
IEMOB[i]
0
i
CANIE 1/2
SIT[i]
CANSIT 1/2
SERG
CERG
FERG
AERG
BOFFI
OVRTIM
BXOK
ENRX
ENERR
CANGIE.4
CANGIE.5
CANGIE.3
ENBX
ENERG
ENBOFF
CANGIE.2
CANGIE.1
CANGIE.6
ENIT
CAN IT
CANGIE.7
CANIT
CANGIT.7
ENOVRT
OVR IT
CANGIE.0
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