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| 型號(hào)： | MQ80C52TXXX-30SBR |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁(yè)數(shù)： | 51/141頁(yè) |
| 文件大?。?/td> | 7628K |
| 代理商： | MQ80C52TXXX-30SBR |
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229
8021G–AVR–03/11
ATmega329P/3290P
Bit 7 – Reserved
This bit is reserved for future use. To ensure compatibility with future devices, this bit must be
written to zero when ADCSRB is written.
Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion
will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
.
22.9.5
DIDR0 – Digital Input Disable Register 0
Bit 7:0 – ADC7D:ADC0D: ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7:0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Table 22-6.
ADC Auto Trigger Source Selections
ADTS2
ADTS1
ADTS0
Trigger Source
0
Free Running mode
0
1
Analog Comparator
0
1
0
External Interrupt Request 0
0
1
Timer/Counter0 Compare MatchA
1
0
Timer/Counter0 Overflow
1
0
1
Timer/Counter1 Compare Match B
1
0
Timer/Counter1 Overflow
1
Timer/Counter1 Capture Event
Bit
7
6
543210
ADC7D
ADC6D
ADC5D
ADC4D
ADC3D
ADC2D
ADC1D
ADC0D
DIDR0
Read/Write
R/W
Initial Value
0
000000
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