參數(shù)資料
型號: MQ80C52TXXX-30SBR
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù): 74/141頁
文件大小: 7628K
代理商: MQ80C52TXXX-30SBR
266
7707F–AVR–11/10
AT90USB82/162
Note:
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 t
CLCL for fCK < 12 MHz
- 3 t
CLCL for fCK > 12 MHz
Figure 26-3. SPI Interface Timing Requirements (Master Mode)
Table 26-3.
SPI Interface Timing Requirements (Slave Mode)
26.7
Hardware Boot EntranceTiming Characteristics
Figure 26-4. Hardware Boot Timing Requirements
MOSI
(Data Output)
SCK
(CPOL = 1)
MISO
(Data Input)
SCK
(CPOL = 0)
SS
MSB
LSB
MSB
...
61
22
3
45
8
7
MISO
(Data Output)
SCK
(CPOL = 1)
MOSI
(Data Input)
SCK
(CPOL = 0)
SS
MSB
LSB
MSB
...
10
11
12
13
14
17
15
9
X
16
RESET
ALE/HWB
t
SHRH
t
HHRH
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