參數(shù)資料
型號(hào): MR80C52EXXX-16SHXXX:R
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44
封裝: LCC-44
文件頁數(shù): 42/143頁
文件大?。?/td> 4602K
136
XMEGA A3BU [DATASHEET]
8362F–AVR–02/2013
1. Disable DTI outputs (Write DTICCxEN to 0).
2. Clear fault flag.
3. Wait for Overflow.
4. Re-enable DTI (Write DTICCxEN to 1).
5. Set pin direction to Output.
This will remove the glitch, but the following period will be shorter.
In Cycle-by-cycle mode the same procedure can be followed as long as the Pattern Generation Mode is not
enabled.
For Pattern Generation Mode, there is no workaround.
11. TWI inactive bus timeout from BUSY bus state
If Bus Timeout is enabled and a timeout occurs on the same Peripheral Clock cycle as a START is detected, the
transaction will be dropped.
Problem fix/Workaround
None.
12. TOSC32 as RTC32 clock output Non-functional
Selecting TOSC32 as clock output is Non-functional.
Problem fix/Workaround
If 32kHz clock output is required, the internal 32.768kHz oscillator can be selected as source for RTC32 and out-
put to pin.
13. Pending asynchronous RTC32-interrupts will not wake up device
Asynchronous Interrupts from the Real-Time-Counter that is pending when the sleep instruction is executed, will
be ignored until the device is woken from another source or the source triggers again.
Problem fix/Workaround
In software, read the RTC32 CNT value before executing the SLEEP instruction and check that it will not to gener-
ate overflow or compare match interrupt during the last CPU instruction before the SLEEP instruction is executed.
In addition check that no previous RTC interrupts are pending.
14. Pending full asynchronous pin change interrupts will not wake the device
Any full asynchronous pin-change Interrupt from pin 2, on any port, that is pending when the sleep instruction is
executed, will be ignored until the device is woken from another source or the source triggers again. This applies
when entering all sleep modes where the System Clock is stopped.
Problem fix/Workaround
Use limited asynchronous pin-change interrupts instead.
39.1.4 rev A-C
Not sampled.
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