- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25623 > MR80C52TXXX-16/883:RD (ATMEL CORP) 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 PDF資料下載
參數(shù)資料
| 型號： | MR80C52TXXX-16/883:RD |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 19/109頁 |
| 文件大?。?/td> | 10824K |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁
22
AT32UC3A
A local bus interface is provided for connecting the CPU to device-specific high-speed systems,
such as floating-point units and fast GPIO ports. This local bus has to be enabled by writing the
LOCEN bit in the CPUCR system register. The local bus is able to transfer data between the
CPU and the local bus slave in a single clock cycle. The local bus has a dedicated memory
range allocated to it, and data transfers are performed using regular load and store instructions.
Details on which devices that are mapped into the local bus space is given in the device-specific
“Peripherals” chapter of this data sheet.
Figure 9-1 on page 22 displays the contents of AVR32UC.
Figure 9-1.
Overview of the AVR32UC CPU
9.2.1
Pipeline Overview
AVR32 UC is a pipelined processor with three pipeline stages. There are three pipeline stages,
Instruction Fetch (IF), Instruction Decode (ID) and Instruction Execute (EX). The EX stage is
split into three parallel subsections, one arithmetic/logic (ALU) section, one multiply (MUL) sec-
tion and one load/store (LS) section.
Instructions are issued and complete in order. Certain operations require several clock cycles to
complete, and in this case, the instruction resides in the ID and EX stages for the required num-
ber of clock cycles. Since there is only three pipeline stages, no internal data forwarding is
required, and no data dependencies can arise in the pipeline.
Figure 9-2 on page 23 shows an overview of the AVR32 UC pipeline stages.
AVR32UC CPU pipeline
Instruction memory controller
High
Speed
Bus
master
MPU
Hi
gh
S
peed
Bus
Hi
gh
S
peed
Bus
OCD
system
O
CD
int
er
face
In
te
rr
up
tc
ont
ro
lle
ri
nte
rfa
ce
High
Speed
Bus slave
Hi
gh
S
peed
Bus
Data
R
A
M
in
te
rfa
ce
High Speed Bus master
Power/
Reset
control
R
ese
tint
erface
CPU Local
Bus
master
C
PU
Lo
ca
lBus
Data memory controller
32058K
AVR32-01/12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MJ80C32U-25:D | MICROCONTROLLER |
| MQ80C32E-36:RD | 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44 |
| S80C32-40:R | 8-BIT, 40 MHz, MICROCONTROLLER, PQCC44 |
| S80C52EXXX-30:D | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 |
| SC80C52XXX-36/883 | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。