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參數(shù)資料
| 型號(hào)： | MSM6242BGS-K |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封裝： | 0.430 INCH, 1.27 MM PITCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 293K |
| 代理商： | MSM6242BGS-K |
2/23
OKI Semiconductor
MSM6242B
FEDL6242B-02
FUNCTIONAL BLOCK DIAGRAM
S1
GATE
&
LATCH
GATE
DECODER
RESET
bit
STOP
bit
30
bit
ADJ HOLD
bit
BUSY
bit
30 sec
ADJ bit
24/12 bit
S10
MI1
H1
W
MI10
H10
D1 D10
MO1
Y1
MO10
Y10
CD
CE
CF
64 Hz
1-sec carry
1-min carry
1-hour carry
STD.P
S1
S
CF
XT
COUNTER
OSC
1 Hz
32.768 kHz
XT
D3
D2
D1
D0
A3
A2
A1
A0
ALE
CS1
CS0
WR
RD
S1 to W and W to Y10 are time counter register
C0 to CF are control register
18-pin Plastic DIP
1
18
STD.P
CS0
ALE
A0
A1
A2
A3
GND
VDD
CS1
XT
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
24-pin Plastic Small Outline
Package
PIN CONFIGURATION
RD
D0
D1
D2
D3
XT
WR
STD.P
NC
ALE
NC
A0
A1
A2
A3
GND
VDD
CS1
XT
D0
D1
D2
D3
XT
WR
NC
CS0
RD
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A0-A3:
D0-D3:
CS0 , CS1:
RD:
ALE:
STD.P:
VDD:
VSS:
Address input
Data input/output
CHIP SELECTS 0,1
READ enable
WRITE enable
Address latch enable
Standard pulse output
XTAL oscillator input/output
+5 V supply
ground
WR:
XT, XT:
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM6242BGS-KR1 | 制造商:ROHM Semiconductor 功能描述: |
| MSM6242BRS | 制造商:ROHM Semiconductor 功能描述: 制造商:OK International 功能描述: |
| MSM6242BRS-7 | 制造商:ROHM Semiconductor 功能描述:Directly connected to the bus real-time clock |
| MSM6250 | 制造商:QUALCOMM 制造商全稱:QUALCOMM 功能描述:CHIPSET SOLUTION |
| MSM6252 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:64words X Bit FIFO |
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