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MSM66573 Family User's Manual
Chapter 9 Capture/Compare Timer
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9.6.2 Compare Out Mode Settings
(1)
Port 5 mode register (P5IO)
If CPCM0 is to be set to the compare out mode, set bit 4 (P5IO4) to "1" to configure the port
as an output. If CPCM1 is to be set to the compare out mode, set bit 5 (P5IO5) to "1" to
configure the port as an output.
(2)
Port 5 secondary function control register (P5SF)
If CPCM0 is to be set to the compare out mode, set bit 4 (P5SF4) to "1" to configure the port
as a secondary function output. If CPCM1 is to be set to the compare out mode, set bit 5
(P5SF5) to "1" to configure the port as a secondary function output.
(3)
Compare control registers (CPCMCON0, CPCMCON1)
If CPCM0 is to be set to the compare out mode, specify with bit 0 (CPCMOUT0) the initial
value to be output to the CPCM0 pin, and specify with bit 1 (CPCMBF0) the value desired
to be output from the CPCM0 pin when the value of the free running counter matches the
contents of the CPCMR0. If CPCM1 is to be set to the compare out mode, specify with bit
0 (CPCMOUT1) the initial value to be output to the CPCM1 pin, and specify with bit 1
(CPCMBF1) the value desired to be output from the CPCM1 pin when the value of the free
running counter matches the contents of the CPCMR1.
(4)
Free running counter (FRC)
The initial value at the start of counting can be set by writing an arbitrary 16-bit value. FRC
can be read from and written to during counting.
(5)
Capture compare registers (CPCMR0, CPCMR1)
If CPCM0 has been set to the compare out mode, set a count value in CPCMR0 at which
to change the CPCM0 pin output. If CPCM1 has been set to the compare out mode, set
a count value in CPCMR1 at which to change the CPCM1 pin output.
(6)
Free running counter control register (FRCON)
Bits 0, 1, and 2 (FRCK0, FRCK1, and FRCK2) specify the count clock for the free running
counter. To set CPCM0 to the compare out mode, reset bit 4 (CP0MD) to "0". To set CPCM1
to the compare out mode, reset bit 5 (CP1MD) to "0". If bit 3 (FRRUN) is set to "1", the free
running counter will begin counting. If reset to "0", the free running counter will halt counting.