參數(shù)資料
型號: MSM7581
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: ITU-T G.721 4ch ADPCM TRANSCODER
中文描述: ITU - T的G.721 4路差分PcM碼器
文件頁數(shù): 15/18頁
文件大?。?/td> 165K
代理商: MSM7581
15/18
Semiconductor
MSM7581
NOTES ON USAGE
(1) Through Mode (CODER Side)
BCLK
PCM side SYNC (SYXP)
PCM Input (SIP)
Internal Latch Timing
ADPCM side SYNC (SYXA)
ADPCM side SYNC (SYXA)
Through-Data Output (SOA)
Through-Data Output (SOA)
t0
t1
1
2
3
4
5
6
7
8
PCMDATA1
ADPCMDATA0
ADPCMDATA1
ADPCMDATA2
PCMDATA2
PCMDATA3
ADPCMDATA0
ADPCMDATA1
*
t1 is the falling edge of the 8th BCLK counted from t0.
(A) When SYXA rises after t1, PCMDATA1 is output to ADPCMDATA1.
(B) When SYXA rises before t1, PCMDATA1 is output to ADPCMDATA1.
If SYXA rises near the t1 and jitter occurs, data slip may occur. Therefore SYXA should not rise in the range of ±500ns from t1.
The data slip means that data is deleted or the same data is output twice.
(A)
(B)
(2) Through Mode (DECODER Side)
BCLK
ADPCM side SYNC (SYRA)
ADPCM Input (SIA)
Internal Latch Timing
PCM side SYNC (SYRP)
PCM side SYNC (SYRP)
Through-Data Output (SOP)
Through-Data Output (SOP)
t0
t1
1
2
3
4
5
6
7
8
ADPCMDATA1
PCMDATA0
PCMDATA1
PCMDATA2
ADPCMDATA2
ADPCMDATA3
PCMDATA0
PCMDATA1
*
t1 is the falling edge of the 8th BCLK counted from t0.
(A) When SYRP rises after t1, ADPCMDATA1 is output to PCMDATA1.
(B) When SYRP rises before t1, ADPCMDATA1 is output to PCMDATA1.
If SYRP rises near the t1 and jitter occurs, data slip may occur. Therefore SYRP should not rise in the range of ±500ns from t1.
The data slip means that data is deleted or the same data is output twice.
(A)
(B)
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