參數(shù)資料
型號(hào)： MSM7661
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： NTSC/PAL Digital Dencoder(NTSC/PAL制式數(shù)字譯碼器)
中文描述： NTSC / PAL數(shù)字Dencoder（的NTSC / PAL制式數(shù)字譯碼器）
文件頁(yè)數(shù)： 13/40頁(yè)
文件大?。?/td> 293K
代理商： MSM7661
Semiconductor
MSM7661
13/40
4.
Synchronization Block
This is a synchronizing signal processing block.
Chip output synchronizing signals and synchronizing signals for internal use are generated by
this block. Various signals are output in this block and the following operation modes can be
selected.
1) SYNC threshold level adjustment
2-1) Fine adjustment of HSY signal (start side)
2-2) Fine adjustment of HSY signal (stop side)
3) HSY signal enable select
High Level
Active*
These signal are used to sync chip and clamp timing to the A/D converter
4) Fine adjustment of HSYNC_L signal
5-1) Fine adjustment of HVALID signal (start side)
5-2) Fine adjustment of HVALID signal (stop side)
6-1) Fine adjustment of VVALID signal (start side)
6-2) Fine adjustment of VVALID signal (stop side)
The data signals are transmitted or received at the rising edge of the HVALID signal.
7) TV, VTR mode select
TV mode
VTR mode*
The TV mode outputs a fixed pixel number per one line and absorbs a jitter that does not appear
on the TV receiver normally.
The VTR mode outputs the results of decoding in accordance with the HSYNC signal regardless
of whether a jitter exists or not.
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