參數(shù)資料
型號(hào)： MSM7661
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： NTSC/PAL Digital Dencoder(NTSC/PAL制式數(shù)字譯碼器)
中文描述： NTSC / PAL數(shù)字Dencoder（的NTSC / PAL制式數(shù)字譯碼器）
文件頁(yè)數(shù)： 27/40頁(yè)
文件大?。?/td> 293K
代理商： MSM7661
Semiconductor
MSM7661
27/40
I
2
C BUS FORMAT
The I
2
C-bus interface input format is shown below.
As mentioned above, the write operation can be executed from subaddress to subaddress
continuously. When the write operation is executed at subaddresses discontinuously, the
Acknowledge and Stop condition formats are input repeatedly after Data 0.
If one of the following matters occurs, the decoder will not return "A" (Acknowledge).
The slave address does not match.
A non-existent subaddress is specified.
The write attribute of a register does not match "X" (read/write control bit).
The input timing is shown below.
S
Slave Address
A
Subaddress
Data n
P
Description
Start condition
Slave address 1000001X, 8th bit is write signal.
Acknowledge. Generated by slave
Subaddress byte
Data to write to address designated by subaddress.
Stop condition
Symbol
Slave Address
S
Subaddress
A
Data 0
A
A
......
Data n
A
P
1
2
7
8
9
ACK
1
t
C_SCL
2
3-8
9
ACK
S
Start Condition
P
Stop Condition
Data Line Stable: Data Valid Change of Data Allowed
SCL
SDA
MSB
I
2
C-bus Basic Input/Output Timing
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