
I
MSM7712
I
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8
Oki Semiconductor
E
2
PROM Interface
E
PCMCIA CIS table) and wireless LAN parameters (e.g. local IEEE address, radio parameters). The design
supports a 64, 128 or 256 byte E
PROM (e.g. 93C46,93C56, or 93C66 types).
2
PROM support is provided to allow for non-volatile storage of the host interface configuration (e.g.
2
The local processor can access the E
ize the E
PROM and provide card parameter storage.
2
PROM for reads, writes and control functions. This is used to initial-
2
Following a reset by the host processor, the 64 or 128 bytes of E
shared RAM to provide the configuration information for the host interface.
E
PROM Interface Signal Descriptions
2
PROM contents are automatically read to
Host Interface (Between Adapter Card and Computer or Laptop)
The 16-bit PCMCIA interface is fully supported by the MSM7712 with no additional logic. Access to
attribute memory (the CIS configuration data) and I/O memory (host registers) are provided.
In normal operation, access to the baseband controller registers and shared buffer memory is via a small
number of I/O addresses. This requires minimum support in memory and input/output from the host
computer.
The signals are defined in the PCMCIA standard. Note that the PCMCIA bus timing is independent of
the system clock timing.
PCMCIA Interface
2
Pin Name
Direction
Description
EEDIO
Bidirectional
This is a bidirectional data signal for the E
a resistor (see E
PROM application notes and
2
PROM. It is connected directly to DI of the E
Figure 3
).
2
PROM, and to DO via
EECS
Output
This signal is connected to CS of the E
2
PROM to provide the chip select.
EESK
Output
This signal is connected to SK of the E
kHz with RCK at 16 MHz).
2
PROM to provide the clock. The clock rate is RCK divided by 64 (250
MSM7712GS-K
Pin Type
PCMCIA
H_CONF
0
HA[8:0]
Input
A[8:0]
HD[15:0]
Bidirectional
D[15:0]
HWEN
Input
WEN
HOEN
Input
OEN
HIORDN
Input
IORDN
Figure 3. E
2
PROM Connections to MSM7712GS-K
EECS
SYNCLK/EESK
SYNDAT/EEDIO
CS
SK
DI
DO
93c46
93c58
94s66
V
V
V
MSM7712