參數(shù)資料
型號(hào)： MSM80C88A-10RS
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 10 MHz, MICROPROCESSOR, PDIP40
封裝： 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40
文件頁(yè)數(shù)： 14/37頁(yè)
文件大?。?/td> 267K
代理商： MSM80C88A-10RS
21/37
Semiconductor
MSM80C88A-10RS/GS/JS
Bus Operation
The MSM80C88A-10 has a time multiplexed address and data bus. If a non-multiplexed bus is
desired for the system, it is only needed to add the address latch.
A CPU bus cycle consists of at least four clock cycles: T1, T2, T3 and T4. (Fig. 4)
The address output occurs during T1, and data transfer occurs during T3 and T4. T2 is used for
changing the direction of the bus during read operation. When the device which is accessed by
the CPU is not ready to data transfer and send to the CPU “NOT READY” is indicated TW cycles
are inserted between T3 and T4.
When a bus cycle is not needed, T1 cycles are inserted between the bus cycles for internal
execution. At the T1 cycle an ALE signal is output from the CPU or the MSM82C88-2 depending
in MN/MX, at the trailing edge of an ALE, a valid address may be latched. Status bits S0, S1 and
S2 are used, in maximum mode, by the bus controller to recognize the type of bus operation
according to the following table.
Status bits S3 through S6 are multiplexed with A16-A19, and therefore they are valid during T2
through T4. S3 and S4 indicate which segment register was selected on the bus cycle, according
to the following table.
0
Read I/O
0 (LOW)
Interrupt acknowledge
S2
0
1
0
S1
Characteristics
Write I/O
Halt
1
0
1
0
1
Read Data from Memory
1 (HIGH)
Instruciton Fetch
0
1
0
Write Data to Memory
Passive (no bus cycle)
1
0
1
0
S0
S5 indicates interrupt enable Flag.
I/O Addressing
The MSM80C88A-10 has a 64 Kbyte I/O. When the CPU accesses an I/O device, addresses A0-
A15 are in same format as a memory access, and A16-A19 are low.
I/O ports addresses are same as four memory.
0
1 (HIGH)
1
Stack
0 (LOW)
Alternate Data (Extra Segment)
S4
1
0
1
0
S3
Characteristics
Code or None
Data
相關(guān)PDF資料
PDF描述
MSM80C88A-10JS 8-BIT, 10 MHz, MICROPROCESSOR, PQCC44
MSM80C88A-10GS-K 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56
MSM81C55-5GS-2K 22 I/O, PIA-GENERAL PURPOSE, PQFP44
MSM82C51A-2GS-VK 1 CHANNEL(S), 64K bps, SERIAL COMM CONTROLLER, PDSO32
MSM82C51A-2JS 1 CHANNEL(S), 64K bps, SERIAL COMM CONTROLLER, PQCC28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM80C88A2JS 制造商:OKI 功能描述:*
MSM8128 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM
MSM8128V-10 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM
MSM8128V-12 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM
MSM8128V-70 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM
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