參數(shù)資料
型號(hào)： MSP430F5326IRGCR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQCC64
封裝： PLASTIC, VQFN-64
文件頁(yè)數(shù)： 13/68頁(yè)
文件大?。?/td> 793K
代理商： MSP430F5326IRGCR
PRODUCTPREVIEW
MSP430F532x
SLAS678 – AUGUST 2010
www.ti.com
Watchdog Timer (WDT_A)
The primary function of the watchdog timer (WDT_A) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
System Module (SYS)
The SYS module handles many of the system functions within the device. These include power on reset and
power up clear handling, NMI source selection and management, reset interrupt vector generators, boot strap
loader entry mechanisms, as well as, configuration management (device descriptors). It also includes a data
exchange mechanism via JTAG called a JTAG mailbox that can be used in the application.
Table 10. System Module Interrupt Vector Registers
INTERRUPT VECTOR REGISTER
ADDRESS
INTERRUPT EVENT
VALUE
PRIORITY
019Eh
No interrupt pending
00h
Brownout (BOR)
02h
Highest
RST/NMI (POR)
04h
PMMSWBOR (BOR)
06h
Wakeup from LPMx.5
08h
Security violation (BOR)
0Ah
SVSL (POR)
0Ch
SVSH (POR)
0Eh
SVML_OVP (POR)
10h
SYSRSTIV , System Reset
SVMH_OVP (POR)
12h
PMMSWPOR (POR)
14h
WDT timeout (PUC)
16h
WDT password violation (PUC)
18h
KEYV flash password violation (PUC)
1Ah
FLL unlock (PUC)
1Ch
Peripheral area fetch (PUC)
1Eh
PMM password violation (PUC)
20h
Reserved
22h to 3Eh
Lowest
019Ch
No interrupt pending
00h
SVMLIFG
02h
Highest
SVMHIFG
04h
SVSMLDLYIFG
06h
SVSMHDLYIFG
08h
SYSSNIV , System NMI
VMAIFG
0Ah
JMBINIFG
0Ch
JMBOUTIFG
0Eh
SVMLVLRIFG
10h
SVMHVLRIFG
12h
Reserved
14h to 1Eh
Lowest
019Ah
No interrupt pending
00h
NMIFG
02h
Highest
OFIFG
04h
SYSUNIV, User NMI
ACCVIFG
06h
Reserved
08h
Reserved
0Ah to 1Eh
Lowest
20
Copyright 2010, Texas Instruments Incorporated
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