參數(shù)資料
型號(hào)： MT48LC16M4A2
廠商： Micron Technology, Inc.
元件分類： DC/DC變換器
英文描述： RSD Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 3.3V; Power: 1W; 1kVDC and 3kVDC Isolation Options; Approved for Medical Applications; Suitable for Automated Assembly; 8, 10 and 12 pin Pinning Style Options; Optional Continuous Short Circuit Protected; Efficiency to 85%
中文描述： 同步DRAM
文件頁(yè)數(shù)： 11/55頁(yè)
文件大?。?/td> 1458K
代理商： MT48LC16M4A2
11
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2003, Micron Technology, Inc.
64Mb: x4, x8, x16
SDRAM
TRUTH TABLE 1 – COMMANDS AND DQM OPERATION
(Note: 1)
NAME (FUNCTION)
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
Write Enable/Output Enable
Write Inhibit/Output High-Z
CS# RAS# CAS# WE# DQM
H
X
X
L
H
H
L
L
H
L
H
L
L
H
L
L
H
H
L
L
H
L
L
L
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
DQs
X
X
X
X
Valid
Active
X
X
NOTES
X
H
H
H
L
L
L
H
X
X
X
3
4
4
L/H
8
L/H
8
X
X
X
5
6, 7
L
–
–
L
–
–
L
–
–
L
–
–
X
L
H
Op-Code
–
–
X
2
8
8
Active
High-Z
Tables appear following the Operation section; these
tables provide current state/next state information.
Commands
Truth Table 1 provides a quick reference of
available commands. This is followed by a written de-
scription of each command. Three additional Truth
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. A0-A11 define the op-code written to the mode register.
3. A0-A11 provide row address, and BA0, BA1 determine which bank is made active.
4. A0-A9 (x4), A0-A8 (x8), or A0-A7 (x16) provide column address; A10 (HIGH) enables the auto precharge feature
(nonpersistent), while A10 (LOW) disables the auto precharge feature; BA0, BA1 determine which bank is being read
from or written to.
5. A10 (LOW): BA0, BA1 determine the bank being precharged. A10 HIGH: All banks precharged and BA0, BA1 are “ Don’t
Care.”
6. This command is AUTO REFRESH if CKE is (HIGH), SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are “ Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
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