![](http://datasheet.mmic.net.cn/180000/MT58L512L18PB-6IT_datasheet_11334063/MT58L512L18PB-6IT_20.png)
20
8Mb: 512K x 18, 256K x 32/36 Pipelined, SCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L512L18P_2.p65 – Rev. 6/01
2001, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
PIPELINED, SCD SYNCBURST SRAM
2.5V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(0°C
≤ T
A ≤ 70°C; VDD = +3.3V +0.3V/-0.165V; VDDQ = +2.5V +0.4V/-0.125V unless otherwise noted)
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
Input High (Logic 1) Voltage
Data bus (DQx)
VIHQ
1.7
VDDQ + 0.3
V
1, 2
Inputs
VIH
1.7
VDD + 0.3
V
1, 2
Input Low (Logic 0) Voltage
VIL
-0.3
0.7
V
1, 2
Input Leakage Current
0V
≤ VIN ≤ VDD
ILI
-1.0
1.0
A
3
Output Leakage Current
Output(s) disabled,
ILO
-1.0
1.0
A
0V
≤ VIN ≤ VDDQ (DQx)
Output High Voltage
IOH = -2.0mA
VOH
1.7
–
V
1, 4
IOH = -1.0mA
VOH
2.0
–
V
1, 4
Output Low Voltage
IOL = 2.0mA
VOL
–
0.7
V
1, 4
IOL = 1.0mA
VOL
–
0.4
V
1, 4
Supply Voltage
VDD
3.135
3.6
V
1
Isolated Output Buffer Supply
VDDQ
2.375
2.9
V
1
NOTE: 1. All voltages referenced to VSS (GND).
2. Overshoot:
VIH
≤ +4.6V for t ≤ tKC/2 for I ≤ 20mA
Undershoot:
VIL
≥ -0.7V for t ≤ tKC/2 for I ≤ 20mA
Power-up:
VIH
≤ +3.6V and VDD ≤ 3.135V for t ≤ 200ms
3. MODE has an internal pull-up, and input leakage = ±10A.
4. The load used for VOH, VOL testing is shown in Figure 4 for 2.5V I/O. AC load current is higher than the shown DC
values. AC I/O curves are available upon request.
5. This parameter is sampled.
6. Preliminary package data.
TQFP CAPACITANCE
DESCRIPTION
CONDITIONS
SYMBOL
TYP
MAX
UNITS
NOTES
Control Input Capacitance
TA = 25°C; f = 1 MHz;
CI
34
pF
5
Input/Output Capacitance (DQ)
VDD = 3.3V
CO
45
pF
5
Address Capacitance
CA
3
3.5
pF
5
Clock Capacitance
CCK
3
3.5
pF
5
FBGA CAPACITANCE
DESCRIPTION
CONDITIONS
SYMBOL
TYP
MAX
UNITS
NOTES
Address/Control Input Capacitance
CI
2.5
3.5
pF
5, 6
Output Capacitance (Q)
T
A = 25°C; f = 1 MHz
CO
4
5
pF
5, 6
Clock Capacitance
CCK
2.5
3.5
pF
5, 6
BGA CAPACITANCE
DESCRIPTION
CONDITIONS
SYMBOL
TYP
MAX
UNITS
NOTES
Address/Control Input Capacitance
T
A = 25°C; f = 1 MHz
CI
3.5
6
pF
5
Input/Output Capacitance (DQ)
VDD = 3.3V
CO
45
pF
5
Address Capacitance
CA
3.5
6
pF
5
Clock Capacitance
CCK
3.5
4
pF
5