參數(shù)資料
型號: MT8920B
廠商: Mitel Networks Corporation
英文描述: ST-BUS Parallel Access Circuit(串行通信總線(ST-Bus)并行存取電路(在ST總線和并行系統(tǒng)間提供一個簡單接口))
中文描述: 意法半導體總線并行訪問電路(串行通信總線(圣總線)并行存取電路(在圣總線和并行系統(tǒng)間提供一個簡單接口))
文件頁數(shù): 12/29頁
文件大?。?/td> 215K
代理商: MT8920B
MT8920B
CMOS
3-14
connected directly to
appropriately.
CS to enable the device
Figure 9 - "Daisy-chained" STPA’s in 32 Channel
Parallel Bus Controller Mode (Mode 3)
In order to facilitate efficient use of the parallel bus
another signal, similar to STCH, is supplied by the
STPA. Delayed Chip Select (DCS) becomes active
for the last half of each channel (Figure 19). This
may be connected to a second STPA, residing on the
same physical parallel bus, enabling it to perform its
read/write operations in the second half of each
channel. This allows a large number of devices,
connected on a common bus, to be driven by two
ST-BUS streams. Figure 9 shows how this "daisy
chaining" of STPA’s is implemented while Figure 10
illustrates the timing on the shared parallel bus.
Applications
Parallel PBX to Digital Trunk Interface
The STPA is an ideal component for interfacing
parallel PBX environments to Mitel’s family of digital
trunk devices.
Figure 11 shows a typical interface for both T1/ESF
and CRC-4 CEPT digital trunks to a system utilizing
a parallel bus architecture. Both the MH89760B
T1/ESF and the MH89790B CRC-4 CEPT trunk
modules are shown interfaced to a parallel bus
structure using two STPAs operating in modes 1 and
2.
The first STPA operating in mode 2 (MMS=0,
MS1=1,
24/32=0),
routes
information between the parallel telecom bus and the
T1 or CEPT link via DSTi and DSTo. The second
STPA, operating in mode 1 (MMS=1) provides
access from the signalling and link control bus to the
MH89760B or MH89790B status and control
channels. All signalling and link functions may be
controlled easily through the STPA transmit RAM’s
Tx0, Tx1, while status information is read at receive
RAM Rx0. In addition, interrupts can be set up to
notify the system in case of slips, loss of sync,
alarms, violations, etc.
data
and/or
voice
Common Bus
0
0
1
OE
WE
A0
A1
A2
A3
A4
CS
DCS
0
0
1
OE
WE
A0
A1
A2
A3
A4
CS
STCH
STi0
STo0
STi0
STo0
MMS MS1 24/32
MMS MS1 24/32
Figure 10 - Timing Relationship for Mode 3 Daisy Chaining
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
N + 1
N - 1
N + 1
N - 1
IN
OUT
IN
OUT
ST-BUS
C4i
Address
OE
WE
Data Bus
STCH
DCS
CHANNEL N
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參數(shù)描述
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