- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383642 > MT8920B (Mitel Networks Corporation) ST-BUS Parallel Access Circuit(串行通信總線（ST-Bus）并行存取電路（在ST總線和并行系統(tǒng)間提供一個簡單接口）) PDF資料下載
參數(shù)資料
| 型號： | MT8920B |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | ST-BUS Parallel Access Circuit(串行通信總線（ST-Bus）并行存取電路（在ST總線和并行系統(tǒng)間提供一個簡單接口）) |
| 中文描述： | 意法半導(dǎo)體總線并行訪問電路（串行通信總線（圣總線）并行存取電路（在圣總線和并行系統(tǒng)間提供一個簡單接口）） |
| 文件頁數(shù)： | 17/29頁 |
| 文件大?。?/td> | 215K |
| 代理商： | MT8920B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
CMOS
MT8920B
3-19
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C, V
DD
=5V, t
CLK
=244 ns, t
CH
=t
CL
=122 ns and are for design aid only: not guaranteed and not subject to production
testing.
The cycle is initiated by the falling edge of CS or DS, whichever occurs last. Timing is relative to the last falling edge which initiates the cycle.
(1) t
cwm
is equal to t
CH
or t
CL
whichever is smaller (some ST-BUS compatible transceivers may generate C4 clock having t
CHmin
=70ns
or t
CLmin
=70ns.
(2) Worst case access when memory contention occurs.
Figure 14 - Mode 1 Parallel Bus Timing
During Interrupt Acknowledge cycle IACK replaces CS. R/W must remain high.
AC Electrical Characteristics
- Mode 1 Parallel Bus Timing (see Fig. 14)
(V
CC
=5.0V
±
5%,T
A
=-40 to 85
°
C)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Address to DS (CS) Low
R/W to DS (CS) Low
DS (CS) Low to DTACK Low
t
ARDS
t
RWDS
t
RDS1,2
t
RD
0
ns
2
20
ns
3
t
cwm
t
cwm
-30
t
CLK
2*t
CLK
ns
Load C
4
Valid Data to DTACK Low (Read)
ns
Load A, C
L
=130pF, R
L
=740
5
DS High to DTACK High
t
DAR
t
DHZ
t
CSH
t
DHT
t
DST
65
ns
Load C, C
L
=50pF
6
DS High to Data High Imped.(Read)
0
45
ns
Load A, C
L
=130pF, R
L
=740
7
DS High to CS High
0
ns
8
Data Hold Time (Write)
0
ns
9
Input Data Valid after DS
t
cwm
-30
ns
10
Address Hold Time
t
ADHT
50
ns
A0 - A5
CS (IACK
)
R/W
DS
DTACK
D0 - D7
D0 - D7
t
ADHT
t
ARDS
t
RWDS
t
RDS
t
RD
t
DST
t
DHT
DATA IN
DATA OUT
t
DHZ
t
DAR
t
CSH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT8924-1 | PCM Conference Circuit (PCC) Preliminary Information |
| MT8924AE | PCM Conference Circuit (PCC) Preliminary Information |
| MT8924AS | PCM Conference Circuit (PCC) Preliminary Information |
| MT8924 | PCM Conference Circuit (PCC) Preliminary Information |
| MT8930B | () |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8920B-1 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY ST-BUS Parallel Access Circuit |
| MT8920BC | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY ST-BUS Parallel Access Circuit |
| MT8920BE | 制造商:Mitel Networks Corporation 功能描述:COMMUNICATIONS INTERFACE, 28 Pin, Plastic, DIP |
| MT8920BE1 | 制造商:Zarlink Semiconductor Inc 功能描述:ST-BUS PARALLEL ACCESS CIRCUIT 28PDIP - Rail/Tube 制造商:Microsemi 功能描述:Microsemi MT8920BE1 Interface Misc |
| MT8920BP | 制造商:Microsemi Corporation 功能描述: 制造商:MITEL 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。