參數(shù)資料
型號(hào): MT8952BS
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 2.5M bps, SERIAL COMM CONTROLLER, PDSO28
封裝: 0.300 INCH, MS-013AE, SOIC-28
文件頁(yè)數(shù): 17/32頁(yè)
文件大?。?/td> 602K
代理商: MT8952BS
MT8952B
Data Sheet
24
Zarlink Semiconductor Inc.
Figure 18 - Timing Information for MPU Read
Figure 19 - Interrupt Request Release Time
CS
E
CS
E
R/W
A0-A3
D0-D7
E clock initiates and
terminates the read cycle
CS initiates and
terminates the read cycle
VALID DATA
High Impedance
tCSE
tEWH
tr
tf
tCYC
tCSE
tRWS
tRWH
tAS
tAH
tDZL
tDZH
tDLZ
tDHZ
tEWL
NOTE: The read cycle can be initiated either by the falling edge of CS or the rising edge of E clock whichever occurs last. Similarly
the cycle can be terminated by CS (rising edge) or E clock (falling edge) whichever occurs first. The timing relations are to be
referenced from the active edge initiating or terminating the cycle.
E
IRQ
tIRQR
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