參數(shù)資料
型號: MT90210
廠商: Mitel Networks Corporation
英文描述: Multi-Rate Parallel Access Circuit(并行多路存取電路)
中文描述: 多速率并行訪問電路(并行多路存取電路)
文件頁數(shù): 12/27頁
文件大小: 133K
代理商: MT90210
MT90210
Preliminary Information
2-156
PLL Considerations
The MT90210 device contains an analog Phase-
Locked Loop (PLL) which is used to create a higher
speed clock for parallel port operation from the input
SCLK. This analog PLL requires a loop filter circuit to
be connected to the LP1 and LP2 pins, as shown in
Figure 10. Additionally, the following design
considerations are recommended for the PLL
circuitry:
Phase tolerance and jitter are independent of
the PLL frequency.
Jitter is affected by the noise on the PLLVDD
and PLLVSS pins. It will increase if the noise
level increases and is recommended to be kept
less than 10 MHz on PLLVDD.
Use of a C2 capacitor of 15-25pF (+10%) is
recommended to reduce jitter.
The components should be connected within
one inch (1") of the package.
Use a wide PCB trace for PLLVDD and PLLVSS
separate from the device VDD/VSS
connections.
In some setups, an RC network (Figure 11)
between PLLVDD and PLLVSS supplies helps
to reduce jitter.
Figure 11 - PLLVDD/PLLVSS RC Circuit
PLLVDD
PLLVSS
+5V
100
1.0nF
M
Figure 10 - Analog PLL Low Pass Filter Circuit
PLLAGND
LP1
LP2
C2
R1= 3k
R2= 100
+ 5%
C1= 10nF + 5%
C2= 20pF
R2
C1
R1
M
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相關代理商/技術參數(shù)
參數(shù)描述
MT90210AL 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Rate Parallel Access Circuit
MT90220 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Octal IMA/UNI PHY Device
MT90220AL 制造商:Zarlink Semiconductor Inc 功能描述:I.C.
MT90220ALX01 制造商:Mitel Networks Corporation 功能描述:
MT90221 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device