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參數(shù)資料
| 型號： | MT90210 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multi-Rate Parallel Access Circuit(并行多路存取電路) |
| 中文描述： | 多速率并行訪問電路（并行多路存取電路） |
| 文件頁數(shù)： | 2/27頁 |
| 文件大?。?/td> | 133K |
| 代理商： | MT90210 |
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MT90210
Preliminary Information
2-146
Figure 2 - Pin Connections
Pin Description
Pin
Name
Description
95-97,
100,
1-3,
6
S0-S2,
S3,
S4-S6,
S7
Serial Lines 0-7
(TTL compatible with internal pullups in the range 25 - 125k
).
Bidirectional, time division multiplexed serial streams. According to mode selected by
MD0-2 inputs, distinct data rates can be selected at the serial port. In mode 3, these lines
are configured as inputs only. In modes 1, 2, 4 and 5, these lines become bidirectional.
7-9,
11-15
S8-S10,
S11-S15
Serial Lines 8-15
. See description for S0-S7 above. In mode 3, S8-S11 are inputs and
S12-S15 are outputs. In modes 1, 2, 4 and 5 these are bidirectional lines.
18-22,
24-26
S16-S20
S21-S23
Serial Lines 16-23.
See descripton for S0 - S7 above. For mode 3, these lines are outputs
and operate at 8.192 Mb/s rates. When operating in modes 1, 2, 4 and 5, these lines are
bidirectional.
27
TDO
Boundary Scan Test Data Output.
29
RDin
Read P0-P7 input clock
. This input is used by the MT90210 to sample bytes coming in at
the parallel port P0-P7 lines. Typically, the user should connect CKout to this input.
30
OEser
Serial Port Output Enable (Input).
On the parallel-to serial conversion direction, this input
is used by the MT90210 to know which time-slots on the serial output streams will be
placed in high-impedance. This input is sampled synchronously along with the parallel
input data before the parallel-to-serial conversion takes place. When low, output serial
channels are actively driven. When set high, the output bus drivers are disabled.
100 PIN PQFP
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
22
24
26
28
30
32
34
36
38
40
44
46
48
42
82
100
98
96
94
92
88
86
84
90
20
18
16
14
12
10
8
6
4
2
VSS
A8
A9
VDD
A10
VDD
VSS
WBC
S0
S1
A6
A7
VSS
A11
A12
RBC
VDD
S3
VSS
S2
S
S
S
S
S
S
S
V
S
S
S
S
S
S
S
T
V
V
S
S
S
S
S
S
V
V
V
O
V
R
PLLVSS
IDDTN
TD
VSS2
C16-
HC4
SCLK
C16+
VDD2
MD0
MD1
MD2
F0i
TRST
TCK
TMS
TDI
PLLAGND
LP1
LP2
V
P
V
C
P
R
R
P
P
P
P
P
P
P
P
S
A
A
V
V
A
A
V
V
V
V
V
A
A
R
Note: the PQFP package meets the JEDEC standard MO-108, CC1.
Critical dimensions:Lead pitch = 0.65mm,
Body Size = 14mm x 20mm,
Package size = 17.9mm x 23.9mm.
相關PDF資料 |
PDF描述 |
|---|---|
| MT90210 | Multi-Rate Parallel Access Circuit |
| MT90210AL | Multi-Rate Parallel Access Circuit |
| MT90220 | Octal IMA/UNI PHY Device(八端口 IMA/UNI 物理層設備（八端口ATM IMA和UNI處理器）) |
| MT90221 | Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設備（四端口ATM IMA和UNI處理器）) |
| MT90401 | SONET/SDH System Synchronizer(SONET/SDH 系統(tǒng)同步裝置（由一個數(shù)字鎖相環(huán)組成）) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT90210AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Rate Parallel Access Circuit |
| MT90220 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Octal IMA/UNI PHY Device |
| MT90220AL | 制造商:Zarlink Semiconductor Inc 功能描述:I.C. |
| MT90220ALX01 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90221 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
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