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參數(shù)資料
| 型號： | MT90840AL |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Distributed Hyperchannel Switch |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP100 |
| 封裝： | 14 X 20 MM, 2.80 MM HEIGHT, MO-112CC-1, MQFP-100 |
| 文件頁數(shù)： | 29/51頁 |
| 文件大小： | 512K |
| 代理商： | MT90840AL |
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Data Sheet
MT90840
2-259
Internal Memory Description
OE/CTo0
Output Enable. Provides per channel tristate control on the parallel port side. It controls the MT90840 parallel output
drivers to disable (tristate, when LOW) or enable (when HIGH) the transmission of data from the device. The
contents of this bit will also be clocked out on the CTo0 output pin at the parallel port rate.
PPBY
Parallel Port Bypass Enable. Indicates that the parallel output channel is going to contain bypassed (PPBY=HIGH)
data from the Receive parallel port of the MT90840. The channels that are not bypassed (PPBY=LOW) can be used
for switching of data from the serial port side, or for message-mode data. The use of this bit is only allowed in Timing
Modes 1 and 2. The PPBY bit is overridden by MC set HIGH.
MC
Message Channel. The message channel contents are programmed by the CPU into the TP Connection Memory
Low. If MC=1 the contents of the corresponding location of TPCM Low are output on the corresponding channel at
the Transmit parallel port. If MC=LOW, the contents of the programmed location in TPCM Low act as an address for
the Data Memory, and so determine the source channel for this output channel. Depending on the timing mode
selected, the source of the connection can be an input channel from either serial (TM1, 2, or 3) or parallel (TM4) data
ports. This bit overrides PPBY if both are set HIGH.
CTo1-3
External Control Lines 1-3. These three bits are used by the CPU to program the three external control pins CTo1-3.
Like OE/CTo0, the contents of these lines will be transmitted to pins CTo1-3 at the parallel port rate.
Note
: CTo2 and
CTo3 cannot be used in Timing Mode 4.
AB8-11
Source Channel Address Bits 8-11. These bits are used along with bits AB0-7 in TPCM Low to select the source
channel for this output channel. In all timing modes
except TM4, only bit AB8 is used, along with bits AB0-7 in TPCM
Low, to select one of 512 serial source channels from the serial port side to be transmitted on this output channel.
Transmit Path Connection Memory High (TPCM High) -
This is an 8-bit x 2430-position memory.
7
6
5
4
3
2
1
0
PPBY
MC
CTo1
CTo2/
AB11
AB9
OE/
CTo0
AB8
CTo3/
AB10
(TX Path CM High)
AB7-0
Source Channel Address Bits. In Timing Modes 1, 2, and 3, these 8 bits are used along with bit AB8 in the TPCM
High to select up to 512 serial source channels from the serial port side to be connected to any 512 (out of 2430)
output channels available on the parallel port side. See table for details.
In Timing Mode 4, these 8 bits are used along with bits AB8-11 in the TPCM High memory to select up to 2430
source channels from the parallel port input to be connected to any of the 2430 channels available on the parallel
port output side.
If message mode is selected at TPCM High bits, the contents of the AB0-7 bits in the TPCM Low locations are
transmitted to the corresponding channels at the PDo0-7 lines until the mode is changed by the CPU.
USE OF THE TPCM HIGH AND LOW ADDRESS BITS WHEN SELECTING SOURCE SERIAL-PORT CHANNELS (TM1, TM2 and TM3)
SERIAL STREAM and CHANNEL ALLOCATION
SOURCE STREAM ADDRESSING
SOURCE CHANNEL ADDRESSING
2 Mbps
16 i/o (512 channels)
AB5,AB6,AB7,AB8 (up to 16 streams)
AB0 to AB4 used to select up to 32 channels
per stream
4 Mbps
8i x 8o (512 channels)
AB6, AB7, AB8 used to select up to 8
streams
AB0 to AB5 used to select up to 64 channels
per stream
8 Mbps
4i x 4o (512 channels)
AB7, AB8 used to select up to 4 streams
AB0 to AB6 used to select up to 128
channels per stream
SOURCE CHANNEL ADDRESSING IN TM4
6.48 Mbyte/s
AB0-AB9 (one of 810 input channels)
16.384 Mbyte/s
AB0 - AB10 (one of 2048 input channels)
19.44 Mbyte/s
AB0 - AB11 (one of 2430 input channels)
Transmit Path Connection Memory Low (TPCM Low) -
This is an 8-bit x 2430-position memory.
7
6
5
4
3
2
1
0
AB6
AB5
AB4
AB3
AB1
AB7
AB2
AB0
(TX Path CM Low)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90840AL1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 512 X 2430/512 X 512/2.373K X 2.373K 5V 100MQFP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH DHS 100MQFP 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH DHS 100MQFP |
| MT90840AP | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 512 X 2430/512 X 512/2.373K X 2.373K 5V 84PLCC - Rail/Tube |
| MT90840AP1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 512 X 2430/512 X 512/2.373K X 2.373K 5V 84PLCC - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH DHS 84PLCC 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH DHS 84PLCC |
| MT90840APR1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 512 X 2430/512 X 512/2.373K X 2.373K 5V 84PLCC - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH DHS 84PLCC 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH DHS 84PLCC |
| MT9085 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS PAC - Parallel Access Circuit |
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