參數(shù)資料
型號(hào): MT9160
廠商: Mitel Networks Corporation
元件分類: Codec
英文描述: ISO2-CMOS 5 Volt Multi-Featured Codec (MFC)
中文描述: ISO2 - 5伏的CMOS多精選編解碼器(MFC)中
文件頁(yè)數(shù): 21/28頁(yè)
文件大小: 402K
代理商: MT9160
Preliminary Information
MT9160
7-97
AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25 °C and are for design aid only: not guaranteed and not subject to production testing.
* Note: TxINC, refer to Control Register 1, address 00h.
AC Characteristics
for A/D (Transmit) Path
- 0dBm0 = 1.421V
rms
for μ-Law and 1.477V
rms
for
A-Law, at the Codec. (V
Ref
=1.0 volts and V
Bias
=2.5 volts.)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Analog input equivalent to
overload decision
A
Li3.17
A
Li3.14
5.79
6.0
Vp-p
Vp-p
μ
-Law
A-Law
Both at Codec
2
Absolute half-channel gain
M ± to Dout
G
AX1
G
AX2
6.0
15.3
dB
dB
Transmit filter gain=0dB
setting.
TxINC = 0*
TxINC = 1*
@1020 Hz
Tolerance at all other transmit
filter settings
(1 to 7dB)
±0.2
dB
3
Gain tracking vs. input level
CCITT G.714 Method 2
G
TX
-0.3
-0.6
-1.6
0.3
0.6
1.6
dB
dB
dB
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
4
Signal to total Distortion vs. input
level.
CCITT G.714 Method 2
D
QX
35
29
24
dB
dB
dB
0 to -30 dBm0
-40 dBm0
-45 dBm0
5
Transmit Idle Channel Noise
N
CX
N
PX
G
RX
15
-71
16
-69
dBrnC0
dBm0p
μ
-Law
A-Law
6
Gain relative to gain at 1020Hz
<50Hz
60Hz
200Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
-0.25
-0.9
-25
-30
0.0
0.25
0.25
-12.5
-25
dB
dB
dB
dB
dB
dB
dB
7
Absolute Delay
D
AX
360
μs
at frequency of minimum
delay
8
Group Delay relative to D
AX
D
DX
750
380
130
750
μs
μs
μs
μs
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
9
Power Supply Rejection
f=1020 Hz
f=0.3 to 3 kHz
f=3 to 4 kHz
f=4 to 50 kHz
PSSR
PSSR1
PSSR2
PSSR3
37
40
35
40
dB
dB
dB
dB
±100mV peak signal on
V
DD
μ
-law
PSSR1-3 not production
tested
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