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參數(shù)資料
| 型號： | MT9160 |
| 廠商： | Mitel Networks Corporation |
| 元件分類： | Codec |
| 英文描述： | ISO2-CMOS 5 Volt Multi-Featured Codec (MFC) |
| 中文描述： | ISO2 - 5伏的CMOS多精選編解碼器（MFC）中 |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 402K |
| 代理商： | MT9160 |
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Preliminary Information
MT9160
7-83
The data streams operate at 2048 kb/s and are Time
Division Multiplexed into 32 identical channels of 64
kb/s bandwidth. A frame pulse (a 244 nSec low going
pulse) is used to parse the continuous serial data
streams into the 32 channel TDM frames. Each
frame has a 125 μSecond period translating into an 8
kHz frame rate. A valid frame begins when F0i
is
logic low coincident with a falling edge of
C4i. Refer
to Figure 11 for detailed ST-BUS timing. C4i
has a
frequency (4096 kHz) which is twice the data rate.
This clock is used to sample the data at the 3/4
bit-cell position on DSTi and to make data available
on DSTo at the start of the bit-cell. C4i
is also used to
clock the MT9160 internal functions (i.e., Filter/
Figure 5 - Serial Port Relative Timing for Intel Mode 0
Figure 6 - Serial Port Relative Timing for Motorola Mode 00/National Microwire
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R/W
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Delays due to internal processor timing which are transparent.
The MT9160:-latches received data on the rising edge of SCLK.
-outputs transmit data on the falling edge of SCLK.
y
The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The
subsequent byte is always data until terminated via CS returning high.
A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
The COMMAND/ADDRESS byte contains:
1 bit - Read/Write
3 bits - Addressing Data
4 bits - Unused
y
COMMAND/ADDRESS
DATA INPUT/OUTPUT
COMMAND/ADDRESS:
DATA 1
RECEIVE
DATA 1
TRANSMIT
SCLK
CS
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y
COMMAND/ADDRESS
DATA INPUT/OUTPUT
COMMAND/ADDRESS:
DATA 2
RECEIVE
DATA 1
TRANSMIT
SCLK
CS
R/W
X
A
1
A
0
X
D
7
D
0
Delays due to internal processor timing which are transparent .
The MT9160:-latches received data on the rising edge of SCLK.
-outputs transmit data on the falling edge of SCLK.
The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The
subsequent byte is always data until terminated via CS returning high.
A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
The COMMAND/ADDRESS byte contains:
1 bit - Read/Write
3 bits - Addressing Data
4 bits - Unused
y
X
X
A
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9160AE | ISO2-CMOS 5 Volt Multi-Featured Codec (MFC) |
| MT9160AS | ISO2-CMOS 5 Volt Multi-Featured Codec (MFC) |
| MT9160BN | ISO2-CMOS 5 Volt Multi-Featured Codec (MFC) |
| MT91610 | Programmable Ringing SLIC(可編程振鈴用戶線路接口電路（帶一個外部驅(qū)動器）) |
| MT9161B | ISO2-CMOS 5 Volt Multi-Featured Codec (MFC) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT91600 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Programmable SLIC |
| MT91600AN | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Programmable SLIC |
| MT91600AN1 | 制造商:Microsemi Corporation 功能描述:SLIC 1CH 55DB 32MA 5V 28SSOP - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:SLIC 1CH 55DB 32MA 5V 28SSOP - Rail/Tube |
| MT91600ANR | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Programmable SLIC |
| MT91600ANR1 | 制造商:Microsemi Corporation 功能描述:SLIC 1CH 55DB 32MA 5V 28SSOP - Tape and Reel |
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