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| 型號(hào)： | MTA81010-XT/SO |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁(yè)數(shù)： | 67/76頁(yè) |
| 文件大小： | 745K |
| 代理商： | MTA81010-XT/SO |
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1995 Microchip Technology Inc.
DS39005D-page 7
MTA81010
3.0
OPERATIONAL REGISTER
FILES
3.1
Timer0 (TMR0) Module
The TMR0 module timer/counter has the following
features:
8-bit timer/counter
Readable and writable
8-bit software programmable prescaler
Internal or external clock select
Edge select for external clock
Figure 3-1 is a simplified block diagram of the TMR0
module, while Figure 3-2 shows the electrical structure
of the TMR0 input.
Timer mode is selected by clearing the T0CS bit
(OPTION<5>). In timer mode, the TMR0 module will
increment every instruction cycle (without prescaler). If
TMR0 is written, increment is inhibited for the following
two cycles (Figure 3-3 and Figure 3-4). The user can
work around this by writing an adjusted value to the
TMR0 module.
Counter mode is selected by setting the T0CS bit
(OPTION<5>).
In this mode TMR0 will increment
either on every rising or falling edge of pin T0CKI. The
incrementing edge is determined by the T0 source
edge (T0SE) select bit (OPTION<4>).
Clearing the
T0SE bit selects the rising edge. Restrictions on the
external
clock input are discussed in detail in
Section 3.1.1.
The prescaler is shared between the TMR0 module
and the watchdog timer. The prescaler assignment is
controlled
in
software
by
the
control
bit
PSA
(OPTION<3>).
Setting the PSA bit will assign the
prescaler to the WDT and cause the prescale for TMR0
to be 1:1. Clearing the PSA bit will assign the prescaler
to TMR0.
The prescaler is neither readable nor
writable. When the prescaler is assigned to the TMR0
module, prescale value of 1:2, 1:4, ..., 1:256 are
selectable.
Section 6.2 details the operation of the
prescaler.
FIGURE 3-1:
TMR0 BLOCK DIAGRAM
FIGURE 3-2:
ELECTRICAL STRUCTURE OF T0CKI PIN
Note 1:
Bits, T0CS, T0SE, PSA, PS2, PS1 and PS0 are located in the OPTION register.
2: The prescaler is shared with Watchdog Timer (Figure 6-6).
T0CKI
T0SE
0
1
0
pin
T0CS
FOSC/4
Programmable
Prescaler
Sync with
Internal
clocks
TMR0
PSout
(2 cycle delay)
PSout
Data bus
8
PSA
PS2, PS1, PS0
3
VSS
RIN
Schmitt Trigger
N
T0CKI
Input Buffer
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| MTA81010S-LPI/SO | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28 |
| MTA81010-LPI/P | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDIP28 |
| MTA81010S-RCI/SO | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28 |
| MTA81010-XTI/P | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDIP28 |
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