參數(shù)資料
型號: MVTX2602
廠商: Zarlink Semiconductor Inc.
英文描述: Managed 24 Port 10/100 Mbps Ethernet Switch
中文描述: 管理的24端口10/100 Mbps以太網(wǎng)交換機
文件頁數(shù): 18/147頁
文件大?。?/td> 924K
代理商: MVTX2602
MVTX2602
Data Sheet
18
Zarlink Semiconductor Inc.
2.6.1 Write Command
2.6.2 Read Command
All registers in MVTX2602 can be modified through this synchronous serial interface.
3.0 MVTX2602 Data Forwarding Protocol
3.1 Unicast Data Frame Forwarding
When a frame arrives it is assigned a handle in memory by the Frame Control Buffer Manager (FCB Manager). An
FCB handle will always be available because of advance buffer reservations.
The memory (SRAM) interface is a 64-bit bus connected to SRAM bank. The Receive DMA (RxDMA) is
responsible for multiplexing the data and the address. On a port’s “turn,” the RxDMA will move 8 bytes (or up to the
end-of-frame) from the port’s associated RxFIFO into memory (Frame Data Buffer, or FDB).
Once an entire frame has been moved to the FDB and a good end-of-frame (EOF) has been received, the Rx
interface makes a switch request. The RxDMA arbitrates among multiple switch requests.
The switch request consists of the first 64 bytes of a frame, containing among other things, the source and
destination MAC addresses of the frame. The search engine places a switch response in the switch response
queue of the frame engine when done. Among other information the search engine will have resolved the
destination port of the frame and will have determined that the frame is unicast.
After processing the switch response, the Transmission Queue Manager (TxQ manager) of the frame engine is
responsible for notifying the destination port that it has a frame to forward to it. But first, the TxQ manager has to
decide whether or not to drop the frame, based on global FDB reservations and usage as well as TxQ occupancy at
the destination. If the frame is not dropped, the TxQ manager links the frame’s FCB to the correct per-port-per-class
TxQ. Unicast TxQ’s are linked lists of transmission jobs represented by their associated frames’ FCB’s. There is
one linked list for each transmission class for each port. There are 4 transmission classes for each of the 24 10/100
ports.
The TxQ manager is responsible for scheduling transmission among the queues representing different classes for a
port. When the port control module determines that there is room in the MAC Transmission FIFO (TxFIFO) for
another frame, it requests the handle of a new frame from the TxQ manager. The TxQ manager chooses among
the head-of-line (HOL) frames from the per-class queues for that port using a Zarlink Semiconductor scheduling
algorithm.
STROBE-
D0
START
ADDRESS
COMMAND
DATA
W
A0
A1
A2
...
A9 A10 A11
D0
D1
D2 D3
D4 D5
D6
D7
2 extra clock cycles after
last transfer
STROBE-
D0
START
ADDRESS
COMMAND
DATA
R
A0
A1
A2
...
A9 A10 A11
AUTOFD-
D0
D1
D2
D3
D4
D5
D6
D7
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MVTX2602AG Managed 24 Port 10/100 Mbps Ethernet Switch
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MVTX2603AG Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2604 Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MVTX2602A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MVTX260x Port Mirroring
MVTX2602AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 24 Port 10/100 Mbps Ethernet Switch
MVTX2602AG2 制造商:Microsemi Corporation 功能描述:
MVTX2603 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 24 port 10/100Mb + 2 port 1Gb Ethernet switch