參數(shù)資料
型號(hào): MVTX2602
廠商: Zarlink Semiconductor Inc.
英文描述: Managed 24 Port 10/100 Mbps Ethernet Switch
中文描述: 管理的24端口10/100 Mbps以太網(wǎng)交換機(jī)
文件頁(yè)數(shù): 57/147頁(yè)
文件大?。?/td> 924K
代理商: MVTX2602
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)當(dāng)前第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)
MVTX2602
Data Sheet
57
Zarlink Semiconductor Inc.
13.2.4 CONTROL_FRAME_REG
CPU transmit/receive switch frames. (8/16 bits)
Address = 3 (read/write)
Format:
Send frame from CPU: In sequence)
Frame Data (size should be in multiple of 8-byte)
8-byte of Frame status (Frame size, Destination port #, Frame O.K. status)
CPU Received frame: In sequence)
8-byte of Frame status (Frame size, Source port #, VLAN tag)
Frame Data
13.2.5 COMMAND&STATUS Register
CPU interface commands (write) and status
Address = 4 (read/write)
When the CPU
writes
to this register
When the CPU reads this register:
Bit [0]:
Set Control Frame Receive buffer ready after CPU writes a complete frame
into the buffer. This bit is self-cleared.
Bit [1]:
Set Control Frame Transmit buffer1 ready after CPU reads out a complete
frame from the buffer. This bit is self-cleared.
Bit [2]:
Set Control Frame Transmit buffer2 ready after CPU reads out a complete
frame from the buffer. This bit is self-cleared.
Bit [3]:
Set this bit to indicate CPU received a whole frame (transmit FIFO frame
receive done) and flushed the rest of frame fragment. This bit will be self-
cleared.
Bit [4]:
Set this bit to indicate that the following Write to the Receive FIFO is the last
one (EOF). This bit will be self-cleared.
Bit [5]:
Set this bit to re-start the data that is sent from the CPU to Receive FIFO
(re-align). This feature can be used for software debug. For normal
operation must be '0'.
Bit [6]:
Do not use. Must be '0'
Bit [7]:
Reserved
Bit [0]:
Control Frame receive buffer ready, CPU can write a new frame
1 – CPU can write a new control command 1
0 – CPU has to wait until this bit is 1 to write a new control command 1
Bit [1]:
Control Frame transmit buffer1 ready for CPU to read
1 – CPU can read a new control command 1
0 – CPU has to wait until this bit is 1 to read a new control command
相關(guān)PDF資料
PDF描述
MVTX2602AG Managed 24 Port 10/100 Mbps Ethernet Switch
MVTX2603 Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603AG Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2604 Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
MVTX2604AG Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MVTX2602A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MVTX260x Port Mirroring
MVTX2602AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 24 Port 10/100 Mbps Ethernet Switch
MVTX2602AG2 制造商:Microsemi Corporation 功能描述:
MVTX2603 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 24 port 10/100Mb + 2 port 1Gb Ethernet switch