參數(shù)資料
型號: NCP1611BDR2G
廠商: ON Semiconductor
文件頁數(shù): 20/29頁
文件大?。?/td> 879K
描述: IC PFC CTLR HE ENHANCED 8-SOIC
標準包裝: 3,000
系列: *
NCP1611
http://onsemi.com
20
Figure 60. DeadTime Generation
Top:
 CrM operation when the current information exceeds the preset level during the demagnetization phase
Middle:
 the circuit restarts at the next valley if the sum (ramp + current information) exceeds the preset level during the deadtime, while
the drainsource voltage is high
Bottom:
 the sum (ramp + current information) exceeds the preset level while during the deadtime, the drainsource voltage is low. The
circuit skips the current valley and restarts at the following one.
Current Information Generation
The   FFcontrol   pin   sources   a   current   that   is
representative of the input current. In practice, I
pin3
 is built
by multiplying the internal control signal (V
REGUL
, i.e., the
internal signal that controls the ontime) by the sense
voltage (pin 2) that is proportional to the input voltage. The
multiplier gain (K
m
 of Figure 61) is three times less in
highline conditions (that is when the LLine signal from
the brownout block is in low state) so that I
pin3
 provides a
voltage representative of the input current across resistor
R
FF
 placed between pin 3 and ground. Pin 3 voltage is the
current information.
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