Signal descriptions The NS7520 has three clock domains: System clock (SYS" />
參數(shù)資料
型號: NS7520B-1-I46
廠商: Digi International
文件頁數(shù): 11/68頁
文件大?。?/td> 0K
描述: IC ARM MICROPROCESSOR 177BGA
標(biāo)準(zhǔn)包裝: 160
系列: NET+ARM®
應(yīng)用: 網(wǎng)絡(luò)處理器
核心處理器: ARM7
程序存儲器類型: 外部程序存儲器
RAM 容量: 外部
接口: EBI/EMI,以太網(wǎng),DMA,SPI,UART
輸入/輸出數(shù): 16
電源電壓: 1.4 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 177-LFBGA
包裝: 托盤
供應(yīng)商設(shè)備封裝: 177-BGA(13x13)
System clock an d res e t
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15
System clock and reset
Signal descriptions
The NS7520 has three clock domains:
System clock (SYSCLK)
Bit rate generation and programmable timer reference clock (XTALA1/2)
System bus clock (BCLK)
The SYS module provides the NS7520 with these clocks, as well as system reset and backup
resources.
This figure shows the timing and specification for RESET_ rise/fall times:
Symbol
Pin
I/O
OD
Description
XTALA1
K14
I
ARM/system oscillator circuit
XTALA2
K12
O
PLLVDD (1.5V)
L15
P
PLL clean power
PLLVSS
L12
P
PLL return
RESET_
A10
I
System reset
Mnemonic
Signal
Description
XTALA1
XTALA2
Oscillator input
Oscillator output
A standard parallel quartz crystal or crystal oscillator can be
attached to these pins to provide the main input clock to the
NS7520.
PLLVDD
PLLVSS
Clean PLL power
Connect directly to the
GND plane
Power and ground for PLL circuit.
RESET_
System reset
Resets the NS7520 hardware.
Table 2: Clock generation and reset signal description
tR max= 18ns
Vin = 0.8Vto 2.0V
tF max= 18ns
Vin = 2.0Vto 0.8V
tF
tR
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NS7520B-1-I55 功能描述:IC ARM MICROPROCESSOR 177BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:NET+ARM® 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng),UART,USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
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