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參數資料
| 型號： | ORSO82G5-3FN680C |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數： | 22/153頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANCEIVERS FPSC 680FPBGA |
| 產品變化通告： | Product Discontinuation 01/Aug/2011 |
| 標準包裝： | 24 |
| 系列： | * |
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Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
118
Power Supplies
Power Supply Descriptions
Table 49 shows the ORSO42G5 and ORSO82G5 FPGAs and embedded core power supply groupings. VDD33 Is
a 3.3V positive power supply used for 3.3V conguration RAMs and internal FPGA PLLs. When using FPGA PLLs,
this power supply should be well isolated from all other power supplies on the board for proper operation. The ve
VDDIO supplies are positive power supply used by the FPGA I/O banks.The 1.5 volt digital power supplies are
used for the FPGA and the embedded core transmit and receive digital logic including the microprocessor logic.
The 1.5 volt analog power supply is used for high-speed analog circuitry in the embedded core between the I/O
buffers and the digital logic. The RX input buffer power supplies are used to power the input (receive) buffers. The
TX output buffer supplies are used to power the output (transmit) buffers. The Rx and TX buffer power supplies can
be independently set to 1.5V or 1.8V, depending on the end application. The guard band supplies are independent
connection brought out to pins.
Table 49. Power Supplies
Recommended Power Supply Connections
Ideally, a board should have the power supplies described below:
VDD33 and VDDIO supplies for the FPGA Logic
A single 1.5V source to supply power to FPGA and core digital logic.
A dedicated 1.5V power supply for the analog power pins. This will allow the end user to minimize noise. The
guard band pins can also be sourced from the analog power supplies.
TX output buffer power. The power supplies to the TX output buffers should be isolated from the rest of the board
power supplies. Special care must be taken to minimize noise when providing board level power to these output
buffers. The power supply can be 1.5V or 1.8V depending on the end application.
RX input buffer power. The power supplies to the Rx input buffers should be isolated from the rest of the board
power supplies. Special care must be taken to minimize noise when providing board level power to these input
buffers. The power supply can be 1.5V or 1.8V depending on the end application.
Recommended Power Supply Filtering Scheme
The board connections of the various SERDES VDD and VSS pins are critical to system performance. An example
demonstration board schematic is available at www.latticesemi.com.
Power supply ltering is in the form of:
A parallel bypass capacitor network consisting of 10 f, 0.1 f, and 1.0 f caps close to the power source.
A parallel bypass capacitor network consisting of 0.01 f and 0.1 f close to the pin on the ORSO42G5 and
ORSO82G5.
FPGA Supplies
FPGA and Core
Digital Supply
1.5V
Analog 1.5V
Tx Output Buffers
1.5V/1.8V
(VDDOB)
Rx Input Buffers
1.5V/1.8V
(VDDIB)
Guard Band
1.5V
(VDDGB)
VDD33
VDD15
VDD_ANA
VDDOB_AA
VDDIB_AA
VDDGB_A
VDDIO0
—
VDDOB_AB
VDDIB_AB
VDDGB_B
VDDIO1
—
VDDOB_AC
VDDIB_AC
—
VDDIO5
—
VDDOB_AD
VDDIB_AD
—
VDDIO6
—
VDDOB_BA
VDDIB_BA
—
VDDIO7
—
VDDOB_BB
VDDIB_BB
—
VDDOB_BC
VDDIB_BC
—
VDDOB_BD
VDDIB_BD
—
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ORSO82G5-3FN680C1 | 功能描述:FPGA - 現場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSO82G5-G2-PAC-EV | 功能描述:可編程邏輯 IC 開發(fā)工具 ORCA ORSO82G5-FPSC Eval Brd RoHS:否 制造商:Altera Corporation 產品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓: |
| ORSPI4 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Dual SPI4 Interface and High-Speed SERDES FPSC |
| ORSPI4-1F1156C | 功能描述:FPGA - 現場可編程門陣列 16192 LUT RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSPI4-1F1156I | 功能描述:FPGA - 現場可編程門陣列 16192 LUT RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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