參數(shù)資料
型號(hào)： OX16PCI952
廠商： Electronic Theatre Controls, Inc.
英文描述： Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
中文描述： 集成高性能的雙UART，并行端口和5.0V PCI接口
文件頁(yè)數(shù)： 28/76頁(yè)
文件大?。?/td> 1386K
代理商： OX16PCI952
7 I
NTERNAL
OX16C950 UART
DataSheet Revision 1.1
Page 28
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
Each of the internal UARTs in the OX16PCI952 is an OX16C950 rev B specification high-performance serial port. The features
of this UART are described in this section.
7.1
Operation – mode selection
The UART is backward compatible with the 16C450, 16C550, 16C654 and 16C750 UARTs. The operation of the port depends
on a number of mode settings, which are referred to throughout this section. The modes, conditions and corresponding FIFO
depth are tabulated below:
UART Mode
FIFO
size
(EFR[4]=1)
450
1
0
X
550
16
1
0
Extended 550
128
1
0
650
128
1
1
750
128
1
0
950
1
128
1
1
FCR[0]
Enhanced mode
FCR[5]
(guarded with LCR[7] = 1)
X
0
X
X
1
X
FIFOSEL
Pin
X
0
1
X
0
X
Table 8: UART Mode Configuration
Note 1: 950 mode configuration is identical to 650 configuration
7.1.1
450 Mode
After a hardware reset, bit 0 of the FIFO Control Register
(‘FCR’) is cleared, hence the UART is compatible with the
16C450. The transmtter and receiver FIFOs (referred to as
the ‘Transmt Holding Register’ and ‘Receiver Holding
Register’ respectively) have a depth of one. This is referred
to as ‘Byte mode’. When FCR[0] is cleared, all other mode
selection parameters are ignored.
7.1.2
550 Mode
After a hardware reset, writing a 1 to FCR[0] will increase
the FIFO size to 16, providing compatibility with 16C550
devices.
7.1.3
750 Mode
Writing a 1 to FCR[0] will increase the FIFO size to 16. In a
simlar fashion to 16C750, the FIFO size can be further
increased to 128 by writing a 1 to FCR[5]. Note that access
to FCR[5] is protected by LCR[7]. i.e., to set FCR[5],
software should first set LCR[7] to temporarily remove the
guard. Once FCR[5] is set, the software should clear
LCR[7] for normal operation.
The 16C750 additional features are available as long as
the UART is not put into Enhanced mode; i.e. ensure
EFR[4] = ‘0’. These features are:
Deeper FIFOs
Automatic RTS/CTS outof-band flow control
7.1.4
The OX16PCI952 UART is compatible with the 16C650
when EFR[4] is set, i.e. the device is in Enhanced mode.
As 650 software drivers usually put the device in Enhanced
mode, running 650 drivers on the one of the UART
channels will result in 650 compatibility with 128 deep
FIFOs, as long as FCR[0] is set. Note that the 650
emulation mode of the OX16PCI952 provides 128-deep
FIFOs rather than the 32 provided by a legacy 16C650.
In enhanced (650) mode the device has the following
features available over those provided by a generic 550.
(Note: some of these are simlar to those provided in 750
mode, but enabled using different registers).
Deeper FIFOs
Sleep mode
Automatic in-band flow control
Special character detection
Infra-red “IrDA-format” transmt and receive mode
Transmttrigger levels
Optional clock prescaler
Sleep mode
650 Mode
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