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參數(shù)資料
| 型號： | P82C55A |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS PROGRAMMABLE PERIPHERAL INTERFACE |
| 中文描述： | 24 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 19/23頁 |
| 文件大小： | 325K |
| 代理商： | P82C55A |
82C55A
CAPACITANCE
T
A
e
25
§
C, V
CC
e
GND
e
0V
Symbol
Parameter
Min
Max
Units
Test Conditions
C
IN
Input Capacitance
10
pF
Unmeasured plns
returned to GND
f
c
e
1 MHz
(5)
C
I/O
I/O Capacitance
20
pF
NOTE:
5. Sampled not 100% tested.
A.C. CHARACTERISTICS
T
A
e
0
§
to 70
§
C, V
CC
e a
5V
g
10%, GND
e
0V
T
A
e b
40
§
C to
a
85
§
C for Extended Temperature
BUS PARAMETERS
READ CYCLE
Symbol
Parameter
82C55A-2
Units
Test
Min
Max
Conditions
t
AR
Address Stable Before RD
v
Address Hold Time After RD
u
0
ns
t
RA
0
ns
t
RR
RD Pulse Width
Data Delay from RD
v
RD
u
to Data Floating
150
ns
t
RD
120
ns
t
DF
10
75
ns
t
RV
Recovery Time between RD/WR
200
ns
WRITE CYCLE
Symbol
Parameter
82C55A-2
Units
Test
Min
Max
Conditions
t
AW
Address Stable Before WR
v
Address Hold Time After WR
u
0
ns
t
WA
20
ns
Ports A & B
20
ns
Port C
t
WW
WR Pulse Width
Data Setup Time Before WR
u
Data Hold Time After WR
u
100
ns
t
DW
100
ns
t
WD
30
ns
Ports A & B
30
ns
Port C
19
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