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參數(shù)資料
| 型號： | P82C55A |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS PROGRAMMABLE PERIPHERAL INTERFACE |
| 中文描述： | 24 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 325K |
| 代理商： | P82C55A |
82C55A
82C55A FUNCTIONAL DESCRIPTION
General
The 82C55A is a programmable peripheral interface
device designed for use in Intel microcomputer sys-
tems. Its function is that of a general purpose I/O
component to interface peripheral equipment to the
microcomputer system bus. The functional configu-
ration of the 82C55A is programmed by the system
software so that normally no external logic is neces-
sary to interface peripheral devices or structures.
Data Bus Buffer
This 3-state bidirectional 8-bit buffer is used to inter-
face the 82C55A to the system data bus. Data is
transmitted or received by the buffer upon execution
of input or output instructions by the CPU. Control
words and status information are also transferred
through the data bus buffer.
Read/Write and Control Logic
The function of this block is to manage all of the
internal and external transfers of both Data and
Control or Status words. It accepts inputs from the
CPU Address and Control busses and in turn, issues
commands to both of the Control Groups.
Group A and Group B Controls
The functional configuration of each port is pro-
grammed by the systems software. In essence, the
CPU ‘‘outputs’’ a control word to the 82C55A. The
control word contains information such as ‘‘mode’’,
‘‘bit set’’, ‘‘bit reset’’, etc., that initializes the func-
tional configuration of the 82C55A.
Each of the Control blocks (Group A and Group B)
accepts ‘‘commands’’ from the Read/Write Control
Logic, receives ‘‘control words’’ from the internal
data bus and issues the proper commands to its as-
sociated ports.
Control Group A - Port A and Port C upper (C7–C4)
Control Group B - Port B and Port C lower (C3–C0)
The control word register can be both written and
read as shown in the address decode table in the
pin descriptions. Figure 6 shows the control word
format for both Read and Write operations. When
the control word is read, bit D7 will always be a logic
‘‘1’’, as this implies control word mode information.
Ports A, B, and C
The 82C55A contains three 8-bit ports (A, B, and C).
All can be configured in a wide variety of functional
characteristics by the system software but each has
its own special features or ‘‘personality’’ to further
enhance the power and flexibility of the 82C55A.
Port A.
One 8-bit data output latch/buffer and one
8-bit input latch buffer. Both ‘‘pull-up’’ and ‘‘pull-
down’’ bus hold devices are present on Port A.
Port B.
One 8-bit data input/output latch/buffer.
Only ‘‘pull-up’’ bus hold devices are present on Port
B.
Port C.
One 8-bit data output latch/buffer and one
8-bit data input buffer (no latch for input). This port
can be divided into two 4-bit ports under the mode
control. Each 4-bit port contains a 4-bit latch and it
can be used for the control signal outputs and status
signal inputs in conjunction with ports A and B. Only
‘‘pull-up’’ bus hold devices are present on Port C.
See Figure 4 for the bus-hold circuit configuration for
Port A, B, and C.
3
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