參數(shù)資料
型號: P83CE598FFB
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with CAN controller(帶CAN控制器的8位微控制器)
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁數(shù): 33/108頁
文件大小: 661K
代理商: P83CE598FFB
1996 Jun 27
33
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xCE598
Note
1.
The Test Register is used for production testing only.
13.5.3
C
ONTROL
R
EGISTER
(CR)
The contents of the Control Register are used to change the behaviour of the CAN-controller. Control bits may be set or
reset by the CPU which uses the Control Register as a read/write memory.
Table 31
Control Register (address 0)
Table 32
Description of the CR bits
Transmit Buffer
A
DDRESS
10: I
DENTIFIER
ID.10
ID.9
ID.8
ID.7
ID.6
ID.5
ID.4
ID.3
A
DDRESS
11: RTR, D
ATA
L
ENGTH
C
ODE
ID.2
ID.1
ID.0
RTR
DLC.3
DLC.2
DLC.1
DLC.0
ADDRESS
12
TO
19: B
YTES
1
TO
8
Data
Data
Data
Data
Data
Data
Data
Data
Receive Buffer 0 and 1
A
DDRESS
20: I
DENTIFIER
ID.10
ID.9
ID.8
ID.7
ID.6
ID.5
ID.4
ID.3
A
DDRESS
21: RTR, D
ATA
L
ENGTH
C
ODE
ID.2
ID.1
ID.0
RTR
DLC.3
DLC.2
DLC.1
DLC.0
ADDRESS
22
TO
29: B
YTES
1
TO
8
Data
Data
Data
Data
Data
Data
Data
Data
7
6
5
4
3
2
1
0
TM
S
RA
OIE
EIE
TIE
RIE
RR
BIT
SYMBOL
FUNCTION
7
TM
Test Mode
(note 1).If the value of TM is:
HIGH (enabled), then the CAN-controller enters Test Mode (normal operations
impossible).
LOW (disabled), then the CAN-controller is in normal operating mode.
Sync
(note 2). If the value of S is:
HIGH (2 edges), then bus-line transitions from recessive-to-dominant and vice-versa
are used for resynchronization (see Sections 13.5.20 and 13.6).
LOW (1 edge), then the only transitions from recessive-to-dominant are used for
resynchronization.
6
S
BIT
7
6
5
4
3
2
1
0
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