參數(shù)資料
型號(hào): P89LPC902FD,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 17/53頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 1K 8-SOIC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 1
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 7.3728MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 6
程序存儲(chǔ)器容量: 1KB(1K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 剪切帶 (CT)
配用: 622-1006-ND - SOCKET ADAPTER BOARD
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-1995-1
Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 17 December 2004
24 of 53
9397 750 14465
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.
Functional description
Remark: Please refer to the
P89LPC901/902/903 User’s Manual for a more detailed
functional description.
8.1 Enhanced CPU
The P89LPC901/902/903 uses an enhanced 80C51 CPU which runs at 6 times the
speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles,
and most instructions execute in one or two machine cycles.
8.2 Clocks
8.2.1
Clock denitions
The P89LPC901/902/903 device has several internal clocks as dened below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of the
clock sources (see Figure 12, 13, and 14) and can also be optionally divided to a
Note: fosc is dened as the OSCCLK frequency.
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per
machine cycle, and most instructions are executed in one to two machine cycles (two
or four CCLK cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is CCLK/2
8.2.2
CPU clock (OSCCLK)
The P89LPC901/902/903 provides several user-selectable oscillator options in
generating the CPU clock. This allows optimization for a range of needs from high
precision to lowest possible cost. These options are congured when the FLASH is
programmed and include an on-chip Watchdog oscillator and an on-chip RC
oscillator.
The P89LPC901, in addition, includes an option for an oscillator using an external
crystal or an external clock source. The crystal oscillator can be optimized for low,
medium, or high frequency crystals covering a range from 20 kHz to 12 MHz.
8.2.3
Low speed oscillator option (P89LPC901)
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this conguration.
8.2.4
Medium speed oscillator option (P89LPC901)
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this conguration.
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