參數(shù)資料
型號(hào): P89LPC902FD,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 29/53頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 1K 8-SOIC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 1
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 7.3728MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 6
程序存儲(chǔ)器容量: 1KB(1K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 剪切帶 (CT)
配用: 622-1006-ND - SOCKET ADAPTER BOARD
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱(chēng): 568-1995-1
Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 17 December 2004
35 of 53
9397 750 14465
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.16.6
Timer overow toggle output (P89LPC901)
Timers 0 and 1 can be congured to automatically toggle a port output whenever a
timer overow occurs. The same device pins that are used for the T0 and T1 count
inputs are also used for the timer toggle outputs. The port outputs will be a logic 1
prior to the rst timer overow when this mode is turned on.
8.17 Real-Time clock/system timer
The P89LPC901/902/903 has a simple Real-Time clock that allows a user to continue
running an accurate timer while the rest of the device is powered-down. The
Real-Time clock can be a wake-up or an interrupt source. The Real-Time clock is a
23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down
counter. When it reaches all ‘0’s, the counter will be reloaded again and the RTCF
ag will be set. The clock source for this counter can be either the CPU clock (CCLK)
or the XTAL oscillator, provided that the XTAL oscillator is not being used as the CPU
clock. If the XTAL oscillator is used as the CPU clock, then the RTC will use CCLK as
its clock source. Only power-on reset will reset the Real-Time clock and its
associated SFRs to the default state.
8.18 UART (P89LPC903)
The P89LPC903 has an enhanced UART that is compatible with the conventional
80C51 UART except that Timer 2 overow cannot be used as a baud rate source.
The P89LPC903 does include an independent Baud Rate Generator. The baud rate
can be selected from the oscillator (divided by a constant), Timer 1 overow, or the
independent Baud Rate Generator. In addition to the baud rate generation,
enhancements over the standard 80C51 UART include Framing Error detection,
automatic address recognition, selectable double buffering and several interrupt
options. The UART can be operated in 4 modes: shift register, 8-bit UART, 9-bit
UART, and CPU clock/32 or CPU clock/16.
8.18.1
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are
transmitted or received, LSB rst. The baud rate is xed at 1
16 of the CPU clock
frequency.
8.18.2
Mode 1
10 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB rst), and a stop bit (logical ‘1’). When data is received,
the stop bit is stored in RB8 in Special Function Register SCON. The baud rate is
variable and is determined by the Timer 1 overow rate or the Baud Rate Generator
8.18.3
Mode 2
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical ‘0’),
8 data bits (LSB rst), a programmable 9th data bit, and a stop bit (logical ‘1’). When
data is transmitted, the 9th data bit (TB8 in SCON) can be assigned the value of ‘0’ or
‘1’. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When
data is received, the 9th data bit goes into RB8 in Special Function Register SCON,
while the stop bit is not saved. The baud rate is programmable to either 1
16 or 132 of
the CPU clock frequency, as determined by the SMOD1 bit in PCON.
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