參數(shù)資料
型號: P89LPC902FD,112
廠商: NXP Semiconductors
文件頁數(shù): 32/53頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 1K 8-SOIC
產(chǎn)品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 1
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 7.3728MHz
外圍設備: 欠壓檢測/復位,LED,POR,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 剪切帶 (CT)
配用: 622-1006-ND - SOCKET ADAPTER BOARD
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-1995-1
Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 17 December 2004
38 of 53
9397 750 14465
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.20 Internal reference voltage
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as VREF, is 1.23 V ±10%.
8.21 Comparator interrupt
Each comparator has an interrupt ag contained in its conguration register. This ag
is set whenever the comparator output changes state. The ag may be polled by
software or may be used to generate an interrupt.
8.22 Comparator and power reduction modes
The comparators may remain enabled when Power-down or Idle mode is activated,
but the comparators are disabled automatically in Total Power-down mode.
If the comparator interrupt is enabled (except in Total Power-down mode), a change
of the comparator output state will generate an interrupt and wake up the processor. If
the comparator output to a pin is enabled, the pin should be congured in the
push-pull mode in order to obtain fast switching times while in Power-down mode.
The reason is that with the oscillator stopped, the temporary strong pull-up that
normally occurs during switching on a quasi-bidirectional port pin does not take
place.
The comparator consumes power in Power-down and Idle modes, as well as in the
normal operating mode. This fact should be taken into account when system power
consumption is an issue. To minimize power consumption, the user can disable the
comparator via PCONA.5 or put the device in Total Power-down mode.
Fig 19. Comparator input and output connections.
Comparator 1
CN1
(P0.4) CIN1A
(P0.5) CMPREF
VREF
OE1
Change Detect
CO1
CMF1
Interrupt
002aaa453
CMP1 (P0.6)
EC
Change Detect
CMF2
Comparator 2
OE2
CO2
CMP2 (P0.0)
CN2
(P0.2) CIN2A
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