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參數(shù)資料
| 型號： | P89LPC982FDH,529 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 53/85頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU 80C51 8KB FLASH 28TSSOP |
| 標準包裝： | 51 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 26 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | 568-8751-5 P89LPC982FDH,529-ND |
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P89LPC980_982_983_985
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 15 June 2010
57 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
7.29.6 ICP
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC980/982/983/985 through a two-wire serial interface. The NXP ICP facility has
made in-circuit programming in an embedded application - using commercially available
programmers - possible with a minimum of additional expense in components and circuit
board area. The ICP function uses five pins. Only a small connector needs to be available
to interface your application to a commercial programmer in order to use this feature.
Additional details may be found in the P89LPC980/982/983/985 User manual.
7.29.7 IAP
IAP is performed in the application under the control of the microcontroller’s firmware. The
IAP facility consists of internal hardware resources to facilitate programming and erasing.
The NXP IAP has made in-application programming in an embedded application possible
without additional components. Two methods are available to accomplish IAP. A set of
predefined IAP functions are provided in a Boot ROM and can be called through a
common interface, PGM_MTP. Several IAP calls are available for use by an application
program to permit selective erasing and programming of flash sectors, pages, security
bits, configuration bytes, and device ID. These functions are selected by setting up the
microcontroller’s registers before making a call to PGM_MTP at FF03H. The Boot ROM
occupies the program memory space at the top of the address space from FF00H to
FEFFH, thereby not conflicting with the user program memory space.
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the P89LPC980/982/983/985 User manual.
7.29.8 ISP
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC980/982/983/985 through the serial port.
This firmware is provided by NXP and embedded within each P89LPC980/982/983/985
device. The NXP ISP facility has made in-system programming in an embedded
application possible with a minimum of additional expense in components and circuit
board area. The ISP function uses five pins (VDD, VSS, TXD, RXD, and RST). Only a small
connector needs to be available to interface your application to an external circuit in order
to use this feature.
7.29.9 Power-on reset code execution
The P89LPC980/982/983/985 contains two special flash elements: the Boot Vector and
the Boot Status bit. Following reset, the P89LPC980/982/983/985 examines the contents
of the Boot Status bit. If the Boot Status bit is set to zero, power-up execution starts at
location 0000H, which is the normal start address of the user’s application code. When
the Boot Status bit is set to a value other than zero, the contents of the Boot Vector are
used as the high byte of the execution address and the low byte is set to 00H.
Table 11 shows the factory default Boot Vector setting for these devices. A
factory-provided bootloader is pre-programmed into the address space indicated and
uses the indicated bootloader entry point to perform ISP functions. This code can be
erased by the user.
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| P89LPC983 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC983FDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC983FDH,529 | 功能描述:8位微控制器 -MCU 8B MCU 2 CLOCK 80C51 4/8KB WIDE-10B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC985 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC985FA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
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