參數(shù)資料
型號(hào)： P89V51RB2BBC,557
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 22/80頁(yè)
文件大?。?/td> 0K
描述： IC 80C51 MCU 1024 RAM 44TQFP
產(chǎn)品培訓(xùn)模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝： 800
系列： 89V
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 44-TQFP
包裝： 托盤
配用： 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
其它名稱： 935277723557
P89V51RB2BBC
P89V51RB2BBC-ND
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
29 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.4.1 Mode 0
Putting either Timer into mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a xed divide-by-32 prescaler. Figure 8 shows mode 0 operation.
In this mode, the Timer register is congured as a 13-bit register. As the count rolls over
from all 1s to all 0s, it sets the Timer interrupt ag TFn. The count input is enabled to the
Timer when TRn = 1 and either GATE = 0 or INTn = 1. (Setting GATE = 1 allows the Timer
to be controlled by external input INTn, to facilitate pulse width measurements). TRn is a
control bit in the Special Function Register TCON (Figure 7). The GATE bit is in the TMOD
register.
The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper
3 bits of TLn are indeterminate and should be ignored. Setting the run ag (TRn) does not
clear the registers.
Mode 0 operation is the same for Timer 0 and Timer 1 (see Figure 8). There are two
different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
6.4.2 Mode 1
Mode 1 is the same as mode 0, except that all 16 bits of the timer register (THn and TLn)
are used. See Figure 9.
2
IT1
Interrupt 1 Type control bit. Set/cleared by software to specify falling
edge/low level that triggers external interrupt 1.
1
IE0
Interrupt 0 Edge ag. Set by hardware when external interrupt 0
edge/low level is detected. Cleared by hardware when the interrupt is
processed, or by software.
0
IT0
Interrupt 0 Type control bit. Set/cleared by software to specify falling
edge/low level that triggers external interrupt 0.
Table 18.
TCON - Timer/counter control register (address 88H) bit description …continued
Bit
Symbol
Description
Fig 8.
Timer/counter 0 or 1 in mode 0 (13-bit counter)
002aaa519
osc/6
Tn pin
TRn
TnGate
INTn pin
C/T = 0
C/T = 1
TLn
(5-bits)
THn
(8-bits)
TFn
control
overflow
interrupt
相關(guān)PDF資料
PDF描述
VJ1825A223JBCAT4X CAP CER 0.022UF 200V 5% NP0 1825
VJ1825A223KBCAT4X CAP CER 0.022UF 200V NP0 1825
VJ2225A562JBAAT4X CAP CER 5600PF 50V 5% NP0 2225
VJ2225A562JBBAT4X CAP CER 5600PF 100V 5% NP0 2225
VJ2225A562JBCAT4X CAP CER 5600PF 200V 5% NP0 2225
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89V51RB2FA 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 16K FLASH PLCC44
P89V51RB2FA,529 功能描述:8位微控制器 -MCU 80C51 16K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89V51RB2FA529 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 40MHZ LCC-44
P89V51RB2FN 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 16K FLASH DIP40 制造商:NXP Semiconductors 功能描述:IC, MCU 8BIT 80C51 16K FLASH, DIP40
P89V51RB2FN,112 功能描述:8位微控制器 -MCU 80C51 16K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*