參數(shù)資料
型號: PC56F8006VLF
廠商: Freescale Semiconductor
文件頁數(shù): 85/106頁
文件大?。?/td> 0K
描述: DSP 16BIT 48-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 56F8xxx
核心處理器: 56800
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,LIN,SCI,SPI
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 1K x 16
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 托盤
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Overview
Freescale Semiconductor
8
Clock sources
— On-chip relaxation oscillator with two user selectable frequencies: 400 kHz for low speed mode, 8 MHz for
normal operation
— On-chip low-power 1 kHz oscillator can be selected as clock source to the RTC and/or COP
— External clock: crystal oscillator, ceramic resonator, and external clock source
Power management controller (PMC)
— On-chip regulator for digital and analog circuitry to lower cost and reduce noise
— Integrated power-on reset (POR)
— Low-voltage interrupt with a user selectable trip voltage of 1.81 V or 2.31 V
— User selectable brown-out reset
— Run, wait, and stop modes
— Low-power run, wait, and stop modes
— Partial power down mode
Up to 40 general-purpose I/O (GPIO) pins
— Individual control for each pin to be in peripheral or GPIO mode
— Individual input/output direction control for each pin in GPIO mode
— Hysteresis and configurable pullup device on all input pins
— Configurable slew rate and drive strength and optional input low pass filters on all output pins
— 20 mA sink/source current
JTAG/EOnCE debug programming interface for real-time debugging
— IEEE 1149.1 Joint Test Action Group (JTAG) interface
— EOnCE interface for real-time debugging
3.1.6
Power Saving Features
Three low power modes
— Low-speed run, wait, and stop modes: 200 kHz IP bus clock provided by ROSC
— Low-power run, wait, and stop modes: clock provided by external 32–38.4 kHz crystal
— Partial power down mode
Low power external oscillator can be used in any low-power mode to provide accurate clock to active peripherals
Low power real time counter for use in run, wait, and stop modes with internal and external clock sources
32
s typical wakeup time from partial power down modes
Each peripheral can be individually disabled to save power
3.2
Award-Winning Development Environment
Processor ExpertTM (PE) provides a Rapid Application Design (RAD) tool that combines easy-to-use component-based
software application creation with an expert knowledge system.
The CodeWarrior Integrated Development Environment is a sophisticated tool for code navigation, compiling, and debugging.
A complete set of evaluation modules (EVMs), demonstration board kit, and development system cards support concurrent
engineering. Together, PE, CodeWarrior, and EVMs create a complete, scalable tools solution for easy, fast, and efficient
development.
A full set of programmable peripherals — PWM, PGAs, ADCs, SCI, SPI, I2C, PIT, timers, and analog comparators — supports
various applications. Each peripheral can be independently shut down to save power. Any pin in these peripherals can also be
used as general-purpose input/outputs (GPIOs).
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