參數(shù)資料
型號: PC755CVGSU366LE
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: PowerPC 755/745 RISC Microprocessor
中文描述: 32-BIT, 366 MHz, RISC PROCESSOR, CBGA360
封裝: SOLDER COLUMN INTERPOSER, CERAMIC, BGA-360
文件頁數(shù): 36/50頁
文件大?。?/td> 1064K
代理商: PC755CVGSU366LE
36
PC755/745
2138D–HIREL–06/03
The COP header shown in Figure 24 adds many benefits—breakpoints, watchpoints,
register and memory examination/modification and other standard debugger features
are possible through this interface – and can be as inexpensive as an unpopulated foot-
print for a header to be added when needed.
System design information
The COP interface has a standard header for connection to the target system, based on
the 0.025” square-post 0.100” centered header assembly (often called a “Berg” header).
The connector typically has pin 14 removed as a connector key.
Figure 24 shows the COP connector diagram.
Figure 24.
COP Connector Diagram
There is no standardized way to number the COP header shown in Figure 24; conse-
quently, many different pin numbers have been observed from emulator vendors. Some
are numbered top-to-bottom then left-to-right, while others use left-to-right then top-to-
bottom, while still others number the pins counter clockwise from pin one (as with an IC).
Regardless of the numbering, the signal placement recommended in Figure 24 is com-
mon to all known emulators.
The QACK signal shown in Table 17 is usually hooked up to the PCI bridge chip in a
system and is an input to the PC755 informing it that it can go into the quiescent state.
Under normal operation this occurs during a low power mode selection. In order for
COP to work the PC755 must see this signal asserted (pulled down). While shown on
the COP header, not all emulator products drive this signal. To preserve correct power
down operation, QACK should be merged so that it also can be driven by the PCI
bridge.
3
C
13
9
5
1
6
10
2
TOP VIEW
15
11
7
16
12
8
4
No pin
H
S
T
R
T
T
T
G
T
V
Pins 10, 12 and 14 are no-connects.
Pin 14 is not physically present
Q
C
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