參數(shù)資料
型號(hào): PCI6515GHK
廠商: Texas Instruments, Inc.
英文描述: SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
中文描述: 單插槽CardBus控制器,專用智能卡插槽
文件頁(yè)數(shù): 117/148頁(yè)
文件大?。?/td> 760K
代理商: PCI6515GHK
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61
6 CardBus Socket Registers (Function 0)
The
1997 PC Card Standard
requires a CardBus socket controller to provide five 32-bit registers that report and
control socket-specific functions. The PCI6515 controller provides the CardBus socket/ExCA base address register
(PCI offset 10h, see Section 4.12) to locate these CardBus socket registers in PCI memory address space. Table 61
gives the location of the socket registers in relation to the CardBus socket/ExCA base address.
In addition to the five required registers, the PCI6515 controller implements a register at offset 20h that provides
power management control for the socket.
16-Bit Legacy-Mode Base Address
CardBus Socket/ExCA Base Address
10h
44h
CardBus
Socket A
Registers
ExCA
Registers
Card A
20h
800h
844h
Host
Memory Space
address register’s base address.
Offsets are from the CardBus socket/ExCA base
00h
PCI6515 Configuration Registers
Offset
Offset
Figure 61. Accessing CardBus Socket Registers Through PCI Memory
Table 61. CardBus Socket Registers
REGISTER NAME
OFFSET
Socket event
00h
Socket mask
04h
Socket present state
08h
Socket force event
0Ch
Socket control
10h
Reserved
14h1Ch
Socket power management
20h
One or more bits in the register are PME context bits and can be cleared only by the assertion of GRST when PME is enabled. If PME is not
enabled, then these bits are cleared by the assertion of PRST or GRST.
One or more bits in this register are cleared only by the assertion of GRST.
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