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參數(shù)資料
| 型號： | PCI9080 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| 中文描述： | 12O兼容的PCI總線主控接口芯片的適配器和嵌入式系統(tǒng) |
| 文件頁數(shù)： | 17/192頁 |
| 文件大小： | 1551K |
| 代理商： | PCI9080 |
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SECTION 2
PCI 9080
BUS OPERATION
PLX Technology, Inc., 1997
Page 8
Version 1.02
With Direct Slave and DMA modes (PCI 9080 local as
master):
PCI 9080 generates wait states with WAITO#
Local processor generates wait states with READYi#
Use Table 4-39[21:18, 5:2], Table 4-62[5:2], and
Table 4-67[5:2] to program the number of wait states
2.2.3.1.2 Wait State—PCI Side
When the wait state occurs on the PCI side, Master
throttles IRDY# and Slave throttles TRDY#.
2.2.3.2 Burst Mode and Continuous Burst
Mode (Bterm “Burst Terminate” Mode)
Table 2-7. Burst and Bterm on the Local Side
Mode
Burst
Bterm
Result
Single Cycle
0
0
One ADS# per data (default)
Single Cycle
0
1
Still one ADS# per data
Burst-4
1
0
One ADS# per four data
(use this mode for i960)
Burst Forever
1
1
One ADS# per BTERM#
On the local side, BLAST# and BTERM# perform the
following:
If burst is enabled (Table 4-39[26,24] for non-DMA,
Table 4-62[8] and Table 4-67[8] for DMA), but Bterm
is disabled (Table 4-39[7], Table 4-62[7] and Table
4-67[7]), then PCI 9080 bursts four Lwords. BLAST#
is generated at the fourth Lword (LA[3:2]=11), new
ADS# at the first Lword (LA[3:2]=00) of the next
burst.
If BTERM# sampling is enabled and BTERM# is low,
PCI 9080 forces a new ADS#, but does not generate
a new BLAST#.
BTERM# input is only valid when the PCI 9080 is
the Master of the local bus (Direct Slave or DMA
modes).
BTERM# is generated by external logic. It is input to
the PCI 9080 (and i960) and used to tell the PCI
9080 (and i960) to break up a burst cycle.
BTERM# is used for example to signal memory
access is crossing the page boundary.
On the PCI side, burst is always enabled.
Note:
following:
If Bterm is disabled, the PCI 9080 performs the
In every case, it performs four transactions.
32 bit local bus—Burst up to four Lwords
16 bit local bus—Burst up to two Lwords
8 bit local bus—Burst up to one Lword
Note:
9080 internal register bit. BTERM# refers to the PCI
9080 external signal.
In the following sections, Bterm refers to PCI
2.2.3.2.1 Burst Mode
If bursting is enabled and BTERM# input is not enabled,
bursting can start on any boundary and continue up to
an address boundary, as described in Table 2-8. After
the data at the boundary is transferred, PCI 9080
generates a new address cycle (ADS#).
Table 2-8. Burst Mode
Bus Mode
Burst
C, J
32-bit bus—Four Lwords or up to a quad Lword
boundary (LA3, LA2 = 11)
C, J
16-bit bus—Four words or up to a quad word
boundary (LA2, LA1 = 11)
C, J
8-bit bus—Four bytes or up to a quad byte
boundary (LA1, LA0 = 11)
S
16-bit bus—Eight words or up to a quad Lword
boundary (LA3, LA2 = 11)
2.2.3.2.2 Continuous Burst Mode (Bterm “Burst
Terminate” Mode)
Bterm mode enables PCI 9080 to perform long bursts to
devices that can accept longer than four Lword bursts.
PCI 9080 generates one address cycle and continues to
burst data. If a device requires a new address cycle after
a certain address boundary, it can assert BTERM# input
to cause the PCI 9080 to generate a new address cycle.
BTERM# input acknowledges the current data transfer
and requests that a new address cycle be generated
(ADS#). The address will be for the next data transfer. If
Bterm mode is enabled, PCI 9080 asserts BLAST# only
if its FIFOs become FULL/EMPTY or if a transfer is
complete.
Note:
until the previously described conditions are met.
If BTERM# is asserted, BLAST# does not assert
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI9080 REV3 | 制造商:PLX TECH 功能描述: |
| PCI9080-3 | 功能描述:外圍驅(qū)動器與原件 - PCI I2O Compatible PCI BUS MASTER I/O CHIP RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI9080-3 G | 功能描述:外圍驅(qū)動器與原件 - PCI 32Bit Master Chip RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI9080-3G | 制造商:PLX Technology 功能描述: |
| PCI-9111DG | 功能描述:數(shù)據(jù)記錄與采集 100KS/s 12BIT MULTI-FUNCTION CARD RoHS:否 制造商:Lantronix 描述/功能:Analog device server 顯示器類型:None 電流額定值: |
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